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Searched full:emc_mrw2 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-tegra20/
H A Dsdram_param.h84 u32 emc_mrw2; member
/openbmc/linux/drivers/memory/tegra/
H A Dtegra210-emc.h115 #define EMC_MRW2 0x134 macro
851 u32 emc_mrw2; member
H A Dtegra210-emc-cc-r21021.c995 emc_writel(emc, next->emc_mrw2, EMC_MRW2); in tegra210_emc_r21021_set_clock()
1508 ccfifo_writel(emc, next->emc_mrw2, EMC_MRW2, 0); in tegra210_emc_r21021_set_clock()
H A Dtegra124-emc.c121 #define EMC_MRW2 0x134 macro
793 emc_ccfifo_writel(emc, timing->emc_mode_2, EMC_MRW2); in tegra_emc_prepare_timing_change()
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra124-emc.yaml124 value of the EMC_MRW2 register for this set of timings