Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22 |
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#
be4c5c6e |
| 22-Mar-2023 |
Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> |
memory: tegra: read values from correct device
When reading MR18 for Dev1 the code was incorrectly reading the value corresponding to Dev0, so fix this by adjusting the index according to the Tegra
memory: tegra: read values from correct device
When reading MR18 for Dev1 the code was incorrectly reading the value corresponding to Dev0, so fix this by adjusting the index according to the Tegra X1 TRM.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20230322234050.47332-1-diogo.ivo@tecnico.ulisboa.pt Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Revision tags: v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61 |
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#
d71b90e3 |
| 19-Aug-2021 |
Colin Ian King <colin.king@canonical.com> |
memory: tegra: make the array list static const, makes object smaller
Don't populate the array list on the stack but instead it static const. Makes the object code smaller by 110 bytes:
Before:
memory: tegra: make the array list static const, makes object smaller
Don't populate the array list on the stack but instead it static const. Makes the object code smaller by 110 bytes:
Before: text data bss dec hex filename 37713 21992 64 59769 e979 .../tegra/tegra210-emc-cc-r21021.o
After: text data bss dec hex filename 37539 22056 64 59659 e90b .../tegra/tegra210-emc-cc-r21021.o
(gcc version 10.3.0)
Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210819133155.10441-1-colin.king@canonical.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Revision tags: v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62 |
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8014c478 |
| 02-Sep-2020 |
Ye Bin <yebin10@huawei.com> |
memory: tegra: Delete duplicated argument to '|' in function tegra210_emc_r21021_periodic_compensation
In function tegra210_emc_r21021_periodic_compensation when calculate emc_cfg EMC_CFG_DRAM_CLKST
memory: tegra: Delete duplicated argument to '|' in function tegra210_emc_r21021_periodic_compensation
In function tegra210_emc_r21021_periodic_compensation when calculate emc_cfg EMC_CFG_DRAM_CLKSTOP_PD is duplicated.
Signed-off-by: Ye Bin <yebin10@huawei.com> Link: https://lore.kernel.org/r/20200903021542.315195-1-yebin10@huawei.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Revision tags: v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54 |
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4a661364 |
| 24-Jul-2020 |
Krzysztof Kozlowski <krzk@kernel.org> |
memory: tegra: tegra210-emc: fix indentation
Use tabs instead of spaces for indentation.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200724074038.5597-25-
memory: tegra: tegra210-emc: fix indentation
Use tabs instead of spaces for indentation.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200724074038.5597-25-krzk@kernel.org
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Revision tags: v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31 |
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#
0553d7b2 |
| 03-Apr-2020 |
Thierry Reding <treding@nvidia.com> |
memory: tegra: Support derated timings on Tegra210
Derated timings are used to ensure that the memory chips keep operating correctly at high temperatures. This adds code to support polling of the ch
memory: tegra: Support derated timings on Tegra210
Derated timings are used to ensure that the memory chips keep operating correctly at high temperatures. This adds code to support polling of the chip operating state when high temperatures are measured on the chip and change the refresh mode accordingly. Under very high temperatures, the driver will switch to the derated tables to ensure proper operation of the memory chips.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6 |
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#
9b9d8632 |
| 29-May-2019 |
Joseph Lo <josephl@nvidia.com> |
memory: tegra: Add EMC scaling sequence code for Tegra210
This patch includes the sequence for clock tuning and the dynamic training mechanism for the clock above 800MHz.
And historically there hav
memory: tegra: Add EMC scaling sequence code for Tegra210
This patch includes the sequence for clock tuning and the dynamic training mechanism for the clock above 800MHz.
And historically there have been different sequences to change the EMC clock. The sequence to be used is specified in the EMC table. However, for the currently supported upstreaming platform, only the most recent sequence is used. So only support that in this patch.
Based on the work of Peter De Schrijver <pdeschrijver@nvidia.com>.
Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62 |
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#
8014c478 |
| 02-Sep-2020 |
Ye Bin <yebin10@huawei.com> |
memory: tegra: Delete duplicated argument to '|' in function tegra210_emc_r21021_periodic_compensation In function tegra210_emc_r21021_periodic_compensation when calculate emc_cfg EMC_CF
memory: tegra: Delete duplicated argument to '|' in function tegra210_emc_r21021_periodic_compensation In function tegra210_emc_r21021_periodic_compensation when calculate emc_cfg EMC_CFG_DRAM_CLKSTOP_PD is duplicated. Signed-off-by: Ye Bin <yebin10@huawei.com> Link: https://lore.kernel.org/r/20200903021542.315195-1-yebin10@huawei.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Revision tags: v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54 |
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#
4a661364 |
| 24-Jul-2020 |
Krzysztof Kozlowski <krzk@kernel.org> |
memory: tegra: tegra210-emc: fix indentation Use tabs instead of spaces for indentation. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/202
memory: tegra: tegra210-emc: fix indentation Use tabs instead of spaces for indentation. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200724074038.5597-25-krzk@kernel.org
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Revision tags: v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31 |
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#
0553d7b2 |
| 03-Apr-2020 |
Thierry Reding <treding@nvidia.com> |
memory: tegra: Support derated timings on Tegra210 Derated timings are used to ensure that the memory chips keep operating correctly at high temperatures. This adds code to support polli
memory: tegra: Support derated timings on Tegra210 Derated timings are used to ensure that the memory chips keep operating correctly at high temperatures. This adds code to support polling of the chip operating state when high temperatures are measured on the chip and change the refresh mode accordingly. Under very high temperatures, the driver will switch to the derated tables to ensure proper operation of the memory chips. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6 |
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#
9b9d8632 |
| 29-May-2019 |
Joseph Lo <josephl@nvidia.com> |
memory: tegra: Add EMC scaling sequence code for Tegra210 This patch includes the sequence for clock tuning and the dynamic training mechanism for the clock above 800MHz. And hi
memory: tegra: Add EMC scaling sequence code for Tegra210 This patch includes the sequence for clock tuning and the dynamic training mechanism for the clock above 800MHz. And historically there have been different sequences to change the EMC clock. The sequence to be used is specified in the EMC table. However, for the currently supported upstreaming platform, only the most recent sequence is used. So only support that in this patch. Based on the work of Peter De Schrijver <pdeschrijver@nvidia.com>. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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