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Searched full:emc_mrs (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-tegra20/
H A Dsdram_param.h81 u32 emc_mrs; member
H A Demc.h60 u32 mrs; /* 0xCC: EMC_MRS */
/openbmc/linux/drivers/memory/tegra/
H A Dtegra210-emc.h81 #define EMC_MRS 0xcc macro
855 u32 emc_mrs; member
H A Dtegra124-emc.c99 #define EMC_MRS 0xcc macro
789 emc_ccfifo_writel(emc, val, EMC_MRS); in tegra_emc_prepare_timing_change()
H A Dtegra30-emc.c85 #define EMC_MRS 0x0cc macro
754 writel_relaxed(val, emc->regs + EMC_MRS); in emc_prepare_timing_change()
H A Dtegra210-emc-cc-r21021.c1518 ccfifo_writel(emc, next->emc_mrs | in tegra210_emc_r21021_set_clock()
1519 EMC_EMRS_USE_EMRS_LONG_CNT, EMC_MRS, 0); in tegra210_emc_r21021_set_clock()
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra124-emc.yaml134 reset value of the EMC_MRS register for this set of timings