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Searched full:emc_fbio_cfg5 (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper-memory-timings.dtsi369 0x00004288 /* EMC_FBIO_CFG5 */
473 0x00004288 /* EMC_FBIO_CFG5 */
577 0x00004288 /* EMC_FBIO_CFG5 */
681 0x00004288 /* EMC_FBIO_CFG5 */
783 0x00007088 /* EMC_FBIO_CFG5 */
886 0x00005088 /* EMC_FBIO_CFG5 */
994 0x00004288 /* EMC_FBIO_CFG5 */
1098 0x00004288 /* EMC_FBIO_CFG5 */
1202 0x00004288 /* EMC_FBIO_CFG5 */
1306 0x00004288 /* EMC_FBIO_CFG5 */
[all …]
H A Dtegra30-asus-nexus7-tilapia-memory-timings.dtsi64 0x00005088 /* EMC_FBIO_CFG5 */
168 0x00007088 /* EMC_FBIO_CFG5 */
271 0x00005088 /* EMC_FBIO_CFG5 */
H A Dtegra124-nyan-big-emc.dtsi1206 0x106aa298 /* EMC_FBIO_CFG5 */
1374 0x106aa298 /* EMC_FBIO_CFG5 */
1542 0x106aa298 /* EMC_FBIO_CFG5 */
1710 0x106aa298 /* EMC_FBIO_CFG5 */
1878 0x106aa298 /* EMC_FBIO_CFG5 */
2046 0x106aa298 /* EMC_FBIO_CFG5 */
2214 0x104ab098 /* EMC_FBIO_CFG5 */
2382 0x104ab098 /* EMC_FBIO_CFG5 */
2550 0x104ab098 /* EMC_FBIO_CFG5 */
2718 0x104ab098 /* EMC_FBIO_CFG5 */
[all …]
H A Dtegra30-ouya.dts2707 0x00004288 /* EMC_FBIO_CFG5 */
2809 0x00004288 /* EMC_FBIO_CFG5 */
2911 0x00004288 /* EMC_FBIO_CFG5 */
3013 0x00004288 /* EMC_FBIO_CFG5 */
3113 0x00007088 /* EMC_FBIO_CFG5 */
3214 0x00005088 /* EMC_FBIO_CFG5 */
3320 0x00004288 /* EMC_FBIO_CFG5 */
3422 0x00004288 /* EMC_FBIO_CFG5 */
3524 0x00004288 /* EMC_FBIO_CFG5 */
3626 0x00004288 /* EMC_FBIO_CFG5 */
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-tegra20/
H A Dsdram_param.h78 u32 emc_fbio_cfg5; member
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-emc.yaml157 - description: EMC_FBIO_CFG5
302 0x00005088 /* EMC_FBIO_CFG5 */
H A Dnvidia,tegra124-emc.yaml224 - description: EMC_FBIO_CFG5
457 0x106aa298 /* EMC_FBIO_CFG5 */
H A Dnvidia,tegra20-emc.yaml125 - description: EMC_FBIO_CFG5
/openbmc/linux/drivers/memory/tegra/
H A Dtegra210-emc-core.c162 EMC_FBIO_CFG5,
1314 EMC_FBIO_CFG5, (100000 / clk) + 10); in tegra210_emc_dvfs_power_ramp_up()
1320 EMC_FBIO_CFG5, (100000 / clk) + 10); in tegra210_emc_dvfs_power_ramp_up()
1326 EMC_FBIO_CFG5, 12); in tegra210_emc_dvfs_power_ramp_up()
1358 EMC_FBIO_CFG5, 12); in tegra210_emc_dvfs_power_ramp_down()
1773 value = emc_readl(emc, EMC_FBIO_CFG5); in tegra210_emc_detect()
H A Dtegra20-emc.c77 #define EMC_FBIO_CFG5 0x104 macro
168 EMC_FBIO_CFG5,
634 emc_fbio = readl_relaxed(emc->regs + EMC_FBIO_CFG5); in emc_setup_hw()
H A Dtegra30-emc.c92 #define EMC_FBIO_CFG5 0x104 macro
278 [39] = EMC_FBIO_CFG5,
571 fbio_cfg5 = readl_relaxed(emc->regs + EMC_FBIO_CFG5); in emc_prepare_timing_change()
1127 fbio_cfg5 = readl_relaxed(emc->regs + EMC_FBIO_CFG5); in emc_setup_hw()
H A Dtegra124-emc.c31 #define EMC_FBIO_CFG5 0x104 macro
354 EMC_FBIO_CFG5,
901 emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); in emc_init()
H A Dtegra210-emc.h104 #define EMC_FBIO_CFG5 0x104 macro
H A Dtegra210-emc-cc-r21021.c630 value = emc_readl(emc, EMC_FBIO_CFG5) & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in tegra210_emc_r21021_set_clock()
/openbmc/linux/arch/arm/mach-tegra/
H A Dsleep-tegra30.S24 #define EMC_FBIO_CFG5 0x104 macro
523 ldr r2, [r0, #EMC_FBIO_CFG5]