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/openbmc/linux/Documentation/driver-api/
H A Dedac.rst5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
60 * Double-channel
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/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Ddlg,da9121.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adam Ward <Adam.Ward.opensource@diasemi.com>
13 Dialog Semiconductor DA9121 Single-channel 10A double-phase buck converter
14 Dialog Semiconductor DA9122 Double-channel 5A single-phase buck converter
15 Dialog Semiconductor DA9220 Double-channel 3A single-phase buck converter
16 Dialog Semiconductor DA9217 Single-channel 6A double-phase buck converter
17 Dialog Semiconductor DA9130 Single-channel 10A double-phase buck converter
18 Dialog Semiconductor DA9131 Double-channel 5A single-phase buck converter
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/openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/
H A Dpei_data.h1 /* SPDX-License-Identifier: GPL-2.0 */
48 * 0 = leave channel enabled
49 * 1 = disable dimm 0 on channel
50 * 2 = disable dimm 1 on channel
51 * 3 = disable dimm 0+1 on channel
75 * Ports 0-7 can be mapped to OC0-OC3
76 * Ports 8-13 can be mapped to OC4-OC7
80 * < 0x050 = Setting 1 (back panel, 1-5in, lowest tx amplitude)
81 * < 0x140 = Setting 2 (back panel, 5-14in, highest tx amplitude)
84 * < 0x130 = Setting 2 (back panel, 8-13in, higher tx amplitude)
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/openbmc/qemu/hw/audio/
H A Dfmopl.h5 typedef void (*OPL_TIMERHANDLER)(void *param, int channel, double interval_Sec);
10 /* ---------- OPL one of slot ---------- */
40 /* ---------- OPL one of channel ---------- */
60 double freqbase; /* frequency base */
61 double TimerBase; /* Timer base time (==sampling time) */
69 /* FM channel slots */
71 int max_ch; /* maximum channel */
77 uint32_t FN_TABLE[1024]; /* fnumber -> increment counter */
92 /* ---------- Generic interface section ---------- */
H A Dfmopl.c3 ** File: fmopl.c -- software implementation of FM sound generator
41 /* -------------------- for debug --------------------- */
49 /* -------------------- preliminary define section --------------------- */
54 #define DELTAT_MIXING_LEVEL (1) /* DELTA-T ADPCM MIXING LEVEL */
59 #define FREQ_RATE (1<<(FREQ_BITS-20))
63 #define OPL_OUTSB (TL_BITS+3-16) /* OPL output final shift 16bit */
65 #define OPL_MINOUT (-0x8000<<OPL_OUTSB)
67 /* -------------------- quality selection --------------------- */
91 #define VIB_SHIFT (32-9)
93 #define AMS_SHIFT (32-9)
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/
H A DVoltageRegulatorControl.interface.yaml4 voltage regulator channel, and allows external entities to control Voltage
13 - name: Voltage
14 type: double
17 - name: MaxValue
18 type: double
20 - readonly
23 - name: MinValue
24 type: double
26 - readonly
29 - name: Resolution
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/openbmc/dbus-sensors/src/ipmb/
H A DIpmbSDRSensor.cpp15 const constexpr char* ipmbService = "xyz.openbmc_project.Ipmi.Channel.Ipmb";
16 const constexpr char* ipmbDbusPath = "/xyz/openbmc_project/Ipmi/Channel/Ipmb";
51 conn->async_method_call( in getSDRRepositoryInfo()
61 if (!status(self->hostIndex)) in getSDRRepositoryInfo()
73 << self->hostIndex << "\n"; in getSDRRepositoryInfo()
83 self->reserveSDRRepository(recordCount); in getSDRRepositoryInfo()
94 conn->async_method_call( in reserveSDRRepository()
104 if (!status(self->hostIndex)) in reserveSDRRepository()
116 << self->hostIndex << "\n"; in reserveSDRRepository()
122 self->getSDRSensorData(recordCount, resrvIDLSB, resrvIDMSB); in reserveSDRRepository()
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H A DIpmbSensor.cpp8 // http://www.apache.org/licenses/LICENSE-2.0
52 static constexpr double ipmbMaxReading = 0xFF;
53 static constexpr double ipmbMinReading = 0;
144 std::cerr << "Error setting init command for device: " << self->name in initCmdCb()
155 dbusConnection->async_method_call( in runInitCmd()
160 "xyz.openbmc_project.Ipmi.Channel.Ipmb", in runInitCmd()
161 "/xyz/openbmc_project/Ipmi/Channel/Ipmb", "org.openbmc.Ipmb", in runInitCmd()
256 // https://amperecomputing.com/customer-connect/products/altra-family-software---firmware in loadDefaults()
297 const std::vector<uint8_t>& data, double& resp, in processReading()
411 constexpr const size_t shift = 16 - 11; // 11bit into 16bit in processReading()
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/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
21 3. A 32bit mask specifying the DMA channel configuration
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
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/openbmc/linux/Documentation/sound/cards/
H A Dhdspm.rst2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
29 * Single Speed -- 1..64 channels
32 (Note: Choosing the 56channel mode for transmission or as
34 all 64 channels are available for the mixer, so channel count
37 * Double Speed -- 1..32 channels
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/openbmc/linux/include/sound/
H A Dak4114.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 #define AK4114_REG_RXCSB0 0x08 /* RX channel status byte 0 */
20 #define AK4114_REG_RXCSB1 0x09 /* RX channel status byte 1 */
21 #define AK4114_REG_RXCSB2 0x0a /* RX channel status byte 2 */
22 #define AK4114_REG_RXCSB3 0x0b /* RX channel status byte 3 */
23 #define AK4114_REG_RXCSB4 0x0c /* RX channel status byte 4 */
24 #define AK4114_REG_TXCSB0 0x0d /* TX channel status byte 0 */
25 #define AK4114_REG_TXCSB1 0x0e /* TX channel status byte 1 */
26 #define AK4114_REG_TXCSB2 0x0f /* TX channel status byte 2 */
27 #define AK4114_REG_TXCSB3 0x10 /* TX channel status byte 3 */
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H A Dac97_codec.h1 /* SPDX-License-Identifier: GPL-2.0+
24 /* specific - SigmaTel */
33 #define AC97_SIGMATEL_MULTICHN 0x74 /* Multi-Channel programming */
37 /* specific - Analog Devices */
47 /* specific - Cirrus Logic */
56 /* specific - Conexant */
64 /* specific - ALC */
81 #define AC97_ALC650_CHANNEL_MASK 0x00f0 /* Channel number */
106 /* specific - Yamaha YMF7x3 */
110 /* specific - C-Media */
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/openbmc/ipmitool/include/ipmitool/
H A Dipmi_sdr.h22 * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED.
48 #define tos32(val, bits) ((val & ((1<<((bits)-1)))) ? (-((val) & (1<<((bits)-1))) | (val)) : (va…
193 uint16_t deassert_event; /* de-assertion event mask */
327 uint8_t channel:4; /* channel number */ member
333 uint8_t channel:4; /* channel number */ member
404 #define IS_THRESHOLD_SENSOR(s) ((s)->event_type == 1)
405 #define UNITS_ARE_DISCRETE(s) ((s)->unit.analog == 3)
458 uint8_t channel:4; /* channel number */ member
464 uint8_t channel:4; /* channel number */ member
523 uint8_t linearization; /* 70h=non linear, 71h-7Fh=non linear, OEM */
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/openbmc/linux/drivers/video/fbdev/
H A Dpxa3xx-regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 #define FBR0 (0x020) /* DMA Channel 0 Frame Branch Register */
21 #define FBR1 (0x024) /* DMA Channel 1 Frame Branch Register */
22 #define FBR2 (0x028) /* DMA Channel 2 Frame Branch Register */
23 #define FBR3 (0x02C) /* DMA Channel 2 Frame Branch Register */
24 #define FBR4 (0x030) /* DMA Channel 2 Frame Branch Register */
25 #define FBR5 (0x110) /* DMA Channel 2 Frame Branch Register */
26 #define FBR6 (0x114) /* DMA Channel 2 Frame Branch Register */
49 #define FDADR0 (0x200) /* DMA Channel 0 Frame Descriptor Address Register */
50 #define FDADR1 (0x210) /* DMA Channel 1 Frame Descriptor Address Register */
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/openbmc/linux/drivers/media/rc/keymaps/
H A Drc-powercolor-real-angel.c1 // SPDX-License-Identifier: GPL-2.0+
2 // powercolor-real-angel.h - Keytable for powercolor_real_angel Remote Controller
4 // keymap imported from ir-keymaps.c
8 #include <media/rc-map.h>
29 { 0x0a, KEY_DIGITS }, /* single, double, triple digit */
30 { 0x29, KEY_PREVIOUS }, /* previous channel */
35 { 0x20, KEY_CHANNELUP }, /* channel up */
36 { 0x21, KEY_CHANNELDOWN }, /* channel down */
/openbmc/linux/drivers/net/wireless/ti/wl1251/
H A Drx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 1998-2007 Texas Instruments Incorporated
19 * The Rx path uses a double buffer and an rx_contro structure, each located
27 * 2) The host reads the received packet from one of the double buffers.
32 #define WL1251_RX_MAX_RSSI -30
33 #define WL1251_RX_MIN_RSSI -95
36 #define WL1251_RX_ALIGN(len) (((len) + WL1251_RX_ALIGN_TO - 1) & \
37 ~(WL1251_RX_ALIGN_TO - 1))
67 * 0 - 802.11
68 * 1 - 802.3
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/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7923.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD7923 and similars with 4 and 8 Channel ADCs.
10 - Michael Hennerich <michael.hennerich@analog.com>
13 Analog Devices AD7904, AD7914, AD7923, AD7924 4 Channel ADCs, and AD7908,
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7923.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7904_7914_7924.pdf
19 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7908_7918_7928.pdf
24 - enum:
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/openbmc/phosphor-host-ipmid/dbus-sdr/
H A Dsensorcommands.cpp8 // http://www.apache.org/licenses/LICENSE-2.0
19 #include "dbus-sdr/sensorcommands.hpp"
21 #include "dbus-sdr/sdrutils.hpp"
22 #include "dbus-sdr/sensorutils.hpp"
23 #include "dbus-sdr/storagecommands.hpp"
31 #include <phosphor-logging/lg2.hpp>
64 // Refer Table 6-14, DCMI Entity ID Extension, DCMI v1.5 spec
102 static constexpr size_t maxIPMISensors = ((3 * 256) - (3 * 1));
111 static constexpr int GENERAL_ERROR = -1;
172 path = getPathFromSensorNumber((ctx->lun << 8) | sensnum); in getSensorConnection()
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/openbmc/ipmitool/control/
H A Dipmitool.spec.in2 Summary: ipmitool - Utility for IPMI control
8 Source: %{name}-%{version}.tar.gz
9 Buildroot: /var/tmp/ipmitool-root
16 This utility can communicate with IPMI-enabled devices through either a
19 communications and remote Serial-over-LAN functionality.
28 rm -rf $RPM_BUILD_ROOT
34 ./configure --with-kerneldir \
35 --with-rpm-distro=@DISTRO@ \
36 --prefix=%{_prefix} \
37 --bindir=%{_bindir} \
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v6_7.h34 #define UMC_V6_7_CE_CNT_INIT (UMC_V6_7_CE_CNT_MAX - UMC_V6_7_CE_INT_THRESHOLD)
38 /* number of umc channel instance with memory map register access */
42 /* total channel instances in one umc block */
46 /* R14 bit shift should be considered, double the number */
54 /* UMC regiser per channel offset */
61 (((pa) >> 20) & 0x1ULL & adev->df.hash_status.hash_64k) ^ \
62 (((pa) >> 25) & 0x1ULL & adev->df.hash_status.hash_2m) ^ \
63 (((pa) >> 34) & 0x1ULL & adev->df.hash_status.hash_1g))
/openbmc/linux/drivers/staging/sm750fb/
H A Dsm750.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 sm750_doubleTFT = 1, /* 36 bit double pixel tft */
21 /* vga channel is not concerned */
139 int channel;/* which channel this crtc stands for*/ member
142 /* below attributes belong to info->fix, their value depends on specific adaptor*/
164 int *channel; member
166 * which channel these outputs linked with,for sm750:
167 * *channel=0 means primary channel
168 * *channel=1 means secondary channel
169 * output->channel ==> &crtc->channel
/openbmc/ipmitool/lib/
H A Dipmi_sdr.c2 * Copyright (c) 2012 Hewlett-Packard Development Company, L.P.
25 * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED.
72 /* ipmi_sdr_get_unit_string - return units for base/modifier
86 * By default, if units are supposed to be percent, we will pre-pend in ipmi_sdr_get_unit_string()
117 /* sdr_sensor_has_analog_reading - Determine if sensor has an analog reading
125 if (!sr->full) { in sdr_sensor_has_analog_reading()
135 * readings into some of their non-Threshold Sensor. There is in sdr_sensor_has_analog_reading()
137 * an Analog reading is available in a Non-Threshod sensor and in sdr_sensor_has_analog_reading()
140 * non-Threshold. To be safe, we provide this extension for in sdr_sensor_has_analog_reading()
144 if ( UNITS_ARE_DISCRETE(&sr->full->cmn) ) { in sdr_sensor_has_analog_reading()
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/openbmc/linux/drivers/ptp/
H A Dptp_idt82p33.h1 /* SPDX-License-Identifier: GPL-2.0+ */
64 /* Workaround for TOD-to-output alignment issue */
67 /* double dco mode */
87 struct idt82p33_channel channel[MAX_PHC_PLL]; member
94 /* Remember the ptp channel to report extts */
/openbmc/qemu/migration/
H A Dmigration.h10 * the COPYING file in the top-level directory.
17 #include "exec/cpu-common.h"
18 #include "hw/qdev-core.h"
19 #include "qapi/qapi-types-migration.h"
20 #include "qapi/qmp/json-writer.h"
23 #include "io/channel.h"
24 #include "io/channel-buffer.h"
27 #include "postcopy-ram.h"
50 * 1<<6=64 pages -> 256K chunk when page size is 4K. This gives us
56 * 1<<18=256K pages -> 1G chunk when page size is 4K. This is the
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/openbmc/dbus-sensors/src/adc/
H A DADCSensor.cpp8 // http://www.apache.org/licenses/LICENSE-2.0
47 static constexpr double roundFactor = 10000; // 3 decimal places
48 static constexpr double maxVoltageReading = 1.8; // pre sensor scaling
49 static constexpr double minVoltageReading = 0;
55 std::vector<thresholds::Threshold>&& thresholdsIn, const double scaleFactor, in ADCSensor()
67 // NOLINTNEXTLINE(cppcoreguidelines-pro-type-vararg) in ADCSensor()
115 // In case a channel has a bridge circuit,we have to turn the bridge on in setupRead()
120 std::chrono::milliseconds(bridgeGpio->setupTimeMs)); in setupRead()
132 self->inputDev, *buffer, '\n', in setupRead()
138 self->readBuf = buffer; in setupRead()
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