| /openbmc/u-boot/doc/device-tree-bindings/clock/ |
| H A D | st,stm32mp1.txt | 38 0x1: division by 2
39 0x2: division by 4
40 0x3: division by 8
45 0x1: division by 2
46 0x2: division by 3
47 0x3: division by 4
62 0x0: bypass (division by 1)
63 0x1: division by 2
64 0x2: division by 3
65 0x3: division by 4
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| /openbmc/u-boot/arch/arm/lib/ |
| H A D | div64.S | 31 * __do_div64: perform a division with 64-bit dividend and 32-bit divisor.
87 @ The division loop for needed upper bit positions.
103 @ The division loop for lower bit positions.
143 @ If possible, branch for another shift in the division loop.
150 8: @ Division by a power of 2: determine what that divisor order is
190 @ eq -> division by 1: obvious enough...
201 @ Division by 0:
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| H A D | lib1funcs.S | 3 * linux/arch/arm/lib/lib1funcs.S: Optimized ARM division routines
42 @ at the left end of each 4 bit nibbles in the division loop
51 @ division loop. Continue shifting until the divisor is
71 @ Division loop
138 @ division loop. Continue shifting until the divisor is
255 subs r2, r1, #1 @ division by 1 or -1 ?
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| /openbmc/linux/arch/arm/lib/ |
| H A D | div64.S | 29 * __do_div64: perform a division with 64-bit dividend and 32-bit divisor.
84 @ The division loop for needed upper bit positions.
100 @ The division loop for lower bit positions.
140 @ If possible, branch for another shift in the division loop.
147 8: @ Division by a power of 2: determine what that divisor order is
187 @ eq -> division by 1: obvious enough...
198 @ Division by 0:
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| H A D | lib1funcs.S | 2 * linux/arch/arm/lib/lib1funcs.S: Optimized ARM division routines
56 @ at the left end of each 4 bit nibbles in the division loop
65 @ division loop. Continue shifting until the divisor is
85 @ Division loop
152 @ division loop. Continue shifting until the divisor is
272 subs r2, r1, #1 @ division by 1 or -1 ?
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| /openbmc/u-boot/include/ |
| H A D | mpc85xx.h | 17 #define SCCR_DFBRG_MSK 0x00000003 /* Division by BRGCLK Mask */
20 #define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 4 */
22 #define SCCR_DFBRG10 0x00000002 /* BRGCLK division by 64 */
23 #define SCCR_DFBRG11 0x00000003 /* BRGCLK division by 256 */
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| H A D | mpc8xx.h | 171 #define SCCR_DFSYNC00 0x00000000 /* SyncCLK division by 1 (normal op.) */
172 #define SCCR_DFSYNC01 0x00002000 /* SyncCLK division by 4 */
173 #define SCCR_DFSYNC10 0x00004000 /* SyncCLK division by 16 */
174 #define SCCR_DFSYNC11 0x00006000 /* SyncCLK division by 64 */
175 #define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 1 (normal op.) */
176 #define SCCR_DFBRG01 0x00000800 /* BRGCLK division by 4 */
177 #define SCCR_DFBRG10 0x00001000 /* BRGCLK division by 16 */
178 #define SCCR_DFBRG11 0x00001800 /* BRGCLK division by 64 */
179 #define SCCR_DFNL000 0x00000000 /* Division by 2 (default = minimum) */
180 #define SCCR_DFNL001 0x00000100 /* Division by 4 */
[all …]
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| /openbmc/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_common.c | 14 /* ceiling division for positive integers */
31 /* round division of two positive integers to the nearest whole number */
40 printf("%s: error: division by zero\n", __func__); in round_div()
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| /openbmc/linux/arch/alpha/include/uapi/asm/ |
| H A D | gentrap.h | 11 #define GEN_INTDIV -2 /* integer division by zero */
13 #define GEN_FLTDIV -4 /* fp division by zero */
18 #define GEN_DECDIV -9 /* decimal division by zero */
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| H A D | fpu.h | 12 #define FPCR_DZED (1UL<<50) /* division by zero disable (opt.) */
15 #define FPCR_DZE (1UL<<53) /* division by zero */
45 #define IEEE_TRAP_ENABLE_DZE (1UL<<2) /* division by zero */
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | mvebu-gated-clock.txt | 23 25 tdm Time Division Mplx
48 25 tdm Time Division Mplx
77 25 tdm Time Division Multiplexing
117 25 tdm Time Division Mplx
173 20 tdm Time Division Mplx
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| H A D | apple,nco.yaml | 15 fractional division of a high frequency input clock.
32 are derived through fractional division.
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| /openbmc/linux/tools/testing/selftests/ftrace/test.d/trigger/ |
| H A D | trigger-hist-expressions.tc | 43 test_hist_expr "Division not associative" "64/8/4/2" "1"
51 test_hist_expr "Division evaluated before addition/subtraction" "4+6/2-2" "5"
61 check_error "Division by zero" 'hist:keys=common_pid:x=3/^0'
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| /openbmc/qemu/linux-user/alpha/ |
| H A D | target_signal.h | 68 #define TARGET_GEN_INTDIV -2 /* integer division by zero */
70 #define TARGET_GEN_FLTDIV -4 /* fp division by zero */
75 #define TARGET_GEN_DECDIV -9 /* decimal division by zero */
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| /openbmc/linux/Documentation/staging/ |
| H A D | crc32.rst | 5 A CRC is a long-division remainder. You add the CRC to the message,
13 It's actually the same long division you learned in school, except that:
20 Like all division, the remainder is always smaller than the divisor.
34 Just like with ordinary division, you proceed one digit (bit) at a time.
35 Each step of the division you take one more digit (bit) of the dividend
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| /openbmc/linux/lib/crypto/mpi/ |
| H A D | mpih-div.c | 40 /* If multiplication is much faster than division, and the in mpihelp_mod_1()
77 * ...one division less... in mpihelp_mod_1()
136 * ...one division less... in mpihelp_mod_1()
258 * treatment of this rare case as normal division would in mpihelp_divrem()
390 /* If multiplication is much faster than division, and the in mpihelp_divmod_1()
426 * ...one division less... in mpihelp_divmod_1()
484 * ...one division less... in mpihelp_divmod_1()
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| /openbmc/qemu/target/s390x/tcg/ |
| H A D | int_helper.c | 37 /* 64/32 -> 32 signed division */
58 /* 64/32 -> 32 unsigned division */
79 /* 64/64 -> 64 signed division */
89 /* 128 -> 64/64 unsigned division */
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/knightslanding/ |
| H A D | floating-point.json | 19 …AVX2, AVX-512 micro-ops except for loads (memory-to-register mov-type micro ops), division, sqrt.",
22 …int, integer and store) except for loads (memory-to-register mov-type micro ops), division, sqrt.",
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| /openbmc/linux/tools/perf/pmu-events/arch/riscv/sifive/u74/ |
| H A D | instructions.json | 55 "BriefDescription": "Integer division instruction retired"
85 "BriefDescription": "Floating-point division or square-root retired"
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| /openbmc/linux/scripts/coccinelle/misc/ |
| H A D | do_div.cocci | 2 /// do_div() does a 64-by-32 division.
5 /// non-zero and be truncated to 0 for division on 64bit platforms.
62 msg="WARNING: do_div() does a 64-by-32 division, please consider using %s instead."
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| /openbmc/linux/arch/nios2/kernel/ |
| H A D | insnemu.S | 94 * is used to differentiate between the division opcodes and the
180 * Prepare for either multiplication or division loop.
215 /* DIVISION
254 * Prepare for division by assuming the result
260 /* Which division opcode? */
279 /* Initialize the unsigned-division loop. */
299 * Division:
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| /openbmc/linux/lib/math/ |
| H A D | gcd.c | 10 * This is faster than the division-based algorithm even on x86, which
11 * has decent hardware division.
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| /openbmc/qemu/tests/tcg/alpha/system/ |
| H A D | boot.S | 195 * Division routines that are normally in libc.
207 * Unsigned 64-bit division.
292 * Signed 64-bit division.
371 * Unsigned 32-bit division.
426 * Signed 32-bit division.
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| /openbmc/entity-manager/src/ |
| H A D | expression.cpp | 45 return Operation::division; in parseOperation()
67 case Operation::division: in evaluate()
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| /openbmc/linux/arch/alpha/lib/ |
| H A D | divide.S | 7 * Alpha division..
11 * The alpha chip doesn't provide hardware division, so we have to do it
159 * Uhh.. Ugly signed division. I'd rather not have it at all, but
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