1*ff3d02b2SIan Rogers[
2*ff3d02b2SIan Rogers    {
3*ff3d02b2SIan Rogers        "BriefDescription": "Counts the number of floating operations retired that required microcode assists",
4*ff3d02b2SIan Rogers        "EventCode": "0xC3",
5*ff3d02b2SIan Rogers        "EventName": "MACHINE_CLEARS.FP_ASSIST",
6*ff3d02b2SIan Rogers        "PublicDescription": "This event counts the number of times that the pipeline stalled due to FP operations needing assists.",
7*ff3d02b2SIan Rogers        "SampleAfterValue": "200003",
8*ff3d02b2SIan Rogers        "UMask": "0x4"
9*ff3d02b2SIan Rogers    },
10*ff3d02b2SIan Rogers    {
11*ff3d02b2SIan Rogers        "BriefDescription": "Counts the number of vector SSE, AVX, AVX2, AVX-512 micro-ops retired. More specifically, it counts packed SSE, AVX, AVX2, AVX-512 micro-ops (both floating point and integer) except for loads (memory-to-register mov-type micro-ops), packed byte and word multiplies.",
12*ff3d02b2SIan Rogers        "EventCode": "0xC2",
13*ff3d02b2SIan Rogers        "EventName": "UOPS_RETIRED.PACKED_SIMD",
14*ff3d02b2SIan Rogers        "PublicDescription": "This event counts the number of packed vector SSE, AVX, AVX2, and AVX-512 micro-ops retired (floating point, integer and store) except for loads (memory-to-register mov-type micro-ops), packed byte and word multiplies.",
15*ff3d02b2SIan Rogers        "SampleAfterValue": "200003",
16*ff3d02b2SIan Rogers        "UMask": "0x40"
17*ff3d02b2SIan Rogers    },
18*ff3d02b2SIan Rogers    {
19*ff3d02b2SIan Rogers        "BriefDescription": "Counts the number of scalar SSE, AVX, AVX2, AVX-512 micro-ops retired. More specifically, it counts scalar SSE, AVX, AVX2, AVX-512 micro-ops except for loads (memory-to-register mov-type micro ops), division, sqrt.",
20*ff3d02b2SIan Rogers        "EventCode": "0xC2",
21*ff3d02b2SIan Rogers        "EventName": "UOPS_RETIRED.SCALAR_SIMD",
22*ff3d02b2SIan Rogers        "PublicDescription": "This event counts the number of scalar SSE, AVX, AVX2, AVX-512 micro-ops retired (floating point, integer and store) except for loads (memory-to-register mov-type micro ops), division, sqrt.",
23*ff3d02b2SIan Rogers        "SampleAfterValue": "200003",
24*ff3d02b2SIan Rogers        "UMask": "0x20"
25*ff3d02b2SIan Rogers    }
26*ff3d02b2SIan Rogers]
27