Searched full:drex (Results 1 – 3 of 3) sorted by relevance
128 VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller)129 |--- DREX 1
476 /* Enable PAUSE for DREX */ in ddr3_mem_ctrl_init()824 * read data fetch cycles and enable DREX auto set powerdown in ddr3_mem_ctrl_init()
143 * @last_overflow_ts: time (in ns) of last overflow of each DREX1374 * There is a need of pausing DREX DMC when divider or MUX in clock tree