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Searched full:disp_cc_mdss_byte0_clk_src (Results 1 – 25 of 50) sorted by relevance

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/openbmc/linux/drivers/clk/qcom/
H A Ddispcc-qcm2290.c126 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
132 .name = "disp_cc_mdss_byte0_clk_src",
148 &disp_cc_mdss_byte0_clk_src.clkr.hw,
295 &disp_cc_mdss_byte0_clk_src.clkr.hw,
469 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sm6115.c152 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
158 .name = "disp_cc_mdss_byte0_clk_src",
174 &disp_cc_mdss_byte0_clk_src.clkr.hw,
344 &disp_cc_mdss_byte0_clk_src.clkr.hw,
534 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sm6375.c144 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
150 .name = "disp_cc_mdss_byte0_clk_src",
256 &disp_cc_mdss_byte0_clk_src.clkr.hw,
290 &disp_cc_mdss_byte0_clk_src.clkr.hw,
521 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sm6125.c147 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
153 .name = "disp_cc_mdss_byte0_clk_src",
353 &disp_cc_mdss_byte0_clk_src.clkr.hw,
371 &disp_cc_mdss_byte0_clk_src.clkr.hw,
622 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sc7180.c161 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
167 .name = "disp_cc_mdss_byte0_clk_src",
339 &disp_cc_mdss_byte0_clk_src.clkr.hw,
355 &disp_cc_mdss_byte0_clk_src.clkr.hw,
646 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sm6350.c152 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
158 .name = "disp_cc_mdss_byte0_clk_src",
173 &disp_cc_mdss_byte0_clk_src.clkr.hw,
375 &disp_cc_mdss_byte0_clk_src.clkr.hw,
694 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sdm845.c109 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
115 .name = "disp_cc_mdss_byte0_clk_src",
376 &disp_cc_mdss_byte0_clk_src.clkr.hw,
394 &disp_cc_mdss_byte0_clk_src.clkr.hw,
775 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sc7280.c163 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
169 .name = "disp_cc_mdss_byte0_clk_src",
362 &disp_cc_mdss_byte0_clk_src.clkr.hw,
424 &disp_cc_mdss_byte0_clk_src.clkr.hw,
804 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sm8250.c231 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
237 .name = "disp_cc_mdss_byte0_clk_src",
646 &disp_cc_mdss_byte0_clk_src.clkr.hw,
725 &disp_cc_mdss_byte0_clk_src.clkr.hw,
1164 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
1301 &disp_cc_mdss_byte0_clk_src, in disp_cc_sm8250_probe()
H A Ddispcc-sm8550.c303 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
310 .name = "disp_cc_mdss_byte0_clk_src",
699 &disp_cc_mdss_byte0_clk_src.clkr.hw,
843 &disp_cc_mdss_byte0_clk_src.clkr.hw,
1632 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
H A Ddispcc-sm8450.c267 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { variable
274 .name = "disp_cc_mdss_byte0_clk_src",
686 &disp_cc_mdss_byte0_clk_src.clkr.hw,
812 &disp_cc_mdss_byte0_clk_src.clkr.hw,
1636 [DISP_CC_MDSS_BYTE0_CLK_SRC] = &disp_cc_mdss_byte0_clk_src.clkr,
/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,sm6115-dispcc.h15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
H A Dqcom,dispcc-qcm2290.h14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
H A Dqcom,dispcc-sm6125.h13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
H A Dqcom,sm6375-dispcc.h15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
H A Dqcom,dispcc-sc7180.h14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro
H A Dqcom,dispcc-sm6350.h15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
H A Dqcom,dispcc-sc7280.h14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
H A Dqcom,dispcc-sdm845.h13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
H A Dqcom,dispcc-sm8150.h13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
H A Dqcom,dispcc-sm8250.h13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
H A Dqcom,dispcc-sm8350.h13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 3 macro
H A Dqcom,sm8450-dispcc.h14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 macro
H A Dqcom,dispcc-sc8280xp.h18 #define DISP_CC_MDSS_BYTE0_CLK_SRC 8 macro
H A Dqcom,sm8550-dispcc.h15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 5 macro

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