1*8397c9c0SMartin Botka /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*8397c9c0SMartin Botka /*
3*8397c9c0SMartin Botka  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4*8397c9c0SMartin Botka  */
5*8397c9c0SMartin Botka 
6*8397c9c0SMartin Botka #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H
7*8397c9c0SMartin Botka #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H
8*8397c9c0SMartin Botka 
9*8397c9c0SMartin Botka #define DISP_CC_PLL0			0
10*8397c9c0SMartin Botka #define DISP_CC_MDSS_AHB_CLK		1
11*8397c9c0SMartin Botka #define DISP_CC_MDSS_AHB_CLK_SRC	2
12*8397c9c0SMartin Botka #define DISP_CC_MDSS_BYTE0_CLK		3
13*8397c9c0SMartin Botka #define DISP_CC_MDSS_BYTE0_CLK_SRC	4
14*8397c9c0SMartin Botka #define DISP_CC_MDSS_BYTE0_INTF_CLK	5
15*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_AUX_CLK		6
16*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_AUX_CLK_SRC	7
17*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_CRYPTO_CLK	8
18*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC	9
19*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_LINK_CLK	10
20*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_LINK_CLK_SRC	11
21*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_LINK_INTF_CLK	12
22*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_PIXEL_CLK	13
23*8397c9c0SMartin Botka #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC	14
24*8397c9c0SMartin Botka #define DISP_CC_MDSS_ESC0_CLK		15
25*8397c9c0SMartin Botka #define DISP_CC_MDSS_ESC0_CLK_SRC	16
26*8397c9c0SMartin Botka #define DISP_CC_MDSS_MDP_CLK		17
27*8397c9c0SMartin Botka #define DISP_CC_MDSS_MDP_CLK_SRC	18
28*8397c9c0SMartin Botka #define DISP_CC_MDSS_MDP_LUT_CLK	19
29*8397c9c0SMartin Botka #define DISP_CC_MDSS_NON_GDSC_AHB_CLK	20
30*8397c9c0SMartin Botka #define DISP_CC_MDSS_PCLK0_CLK		21
31*8397c9c0SMartin Botka #define DISP_CC_MDSS_PCLK0_CLK_SRC	22
32*8397c9c0SMartin Botka #define DISP_CC_MDSS_ROT_CLK		23
33*8397c9c0SMartin Botka #define DISP_CC_MDSS_ROT_CLK_SRC	24
34*8397c9c0SMartin Botka #define DISP_CC_MDSS_VSYNC_CLK		25
35*8397c9c0SMartin Botka #define DISP_CC_MDSS_VSYNC_CLK_SRC	26
36*8397c9c0SMartin Botka #define DISP_CC_XO_CLK			27
37*8397c9c0SMartin Botka 
38*8397c9c0SMartin Botka /* DISP_CC GDSCR */
39*8397c9c0SMartin Botka #define MDSS_GDSC			0
40*8397c9c0SMartin Botka 
41*8397c9c0SMartin Botka #endif
42