Searched +full:db0 +full:- +full:db7 (Results 1 – 10 of 10) sorted by relevance
/openbmc/qemu/hw/net/can/ |
H A D | trace-events | 1 # xlnx-zynqmp-can.c 7 …2_t id, uint8_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5,… 8 …_t id, uint32_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5,… 11 # xlnx-versal-canfd.c
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H A D | xlnx-zynqmp-can.c | 4 * https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf 8 * Written-by: Vikram Garhwal<fnu.vikram@xilinx.com> 41 #include "hw/qdev-properties.h" 46 #include "hw/net/xlnx-zynqmp-can.h" 153 FIELD(TXFIFO_DATA1, DB0, 24, 8) 161 FIELD(TXFIFO_DATA2, DB7, 0, 8) 171 FIELD(TXHPB_DATA1, DB0, 24, 8) 179 FIELD(TXHPB_DATA2, DB7, 0, 8) 190 FIELD(RXFIFO_DATA1, DB0, 24, 8) 198 FIELD(RXFIFO_DATA2, DB7, 0, 8) [all …]
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/openbmc/linux/arch/x86/include/asm/ |
H A D | debugreg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 27 asm("mov %%db0, %0" :"=r" (val)); in native_get_debugreg() 43 * Apply __FORCE_ORDER to DR7 reads to forbid re-ordering them in native_get_debugreg() 47 * when running under SEV-ES. Taking a #VC exception is not a in native_get_debugreg() 49 * re-ordering might place the access into an unsafe location. in native_get_debugreg() 52 * re-ordered to happen before the call to sev_es_ist_enter(), in native_get_debugreg() 55 asm volatile("mov %%db7, %0" : "=r" (val) : __FORCE_ORDER); in native_get_debugreg() 67 asm("mov %0, %%db0" ::"r" (value)); in native_set_debugreg() 83 * Apply __FORCE_ORDER to DR7 writes to forbid re-ordering them in native_set_debugreg() 91 asm volatile("mov %0, %%db7" ::"r" (value), __FORCE_ORDER); in native_set_debugreg() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/auxdisplay/ |
H A D | hit,hd44780.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert@linux-m68k.org> 15 interface, which can be used in either 4-bit or 8-bit mode. By using a 24 data-gpios: 26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or 27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface. 29 - maxItems: 4 30 - maxItems: 8 [all …]
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/openbmc/u-boot/arch/x86/include/asm/ |
H A D | control_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 5 * (C) Copyright 2008-2011 65 asm("mov %%db0, %0" : "=r" (val)); in get_debugreg() 80 asm("mov %%db7, %0" : "=r" (val)); in get_debugreg()
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/openbmc/linux/arch/sh/boards/mach-migor/ |
H A D | lcd_qvga.c | 1 // SPDX-License-Identifier: GPL-2.0 23 * is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?) 24 * Driver IC. This IC is connected to the SH7722 built-in LCDC using a 25 * SYS-80 interface configured in 16 bit mode. 38 /* DB0-DB7 are connected to D1-D8, and DB8-DB15 to D10-D17 */ 53 sys_ops->write_index(sys_ops_handle, adjust_reg18(reg << 8 | data)); in write_reg() 60 sys_ops->write_index(sys_ops_handle, adjust_reg18(reg)); in write_reg16() 61 sys_ops->write_data(sys_ops_handle, adjust_reg18(data)); in write_reg16() 70 sys_ops->write_index(sys_ops_handle, adjust_reg18(reg)); in read_reg16() 71 data = sys_ops->read_data(sys_ops_handle); in read_reg16() [all …]
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/openbmc/qemu/include/hw/xen/interface/arch-x86/ |
H A D | xen.h | 1 /* SPDX-License-Identifier: MIT */ 3 * arch-x86/xen.h 7 * Copyright (c) 2004-2006, K A Fraser 47 #include "xen-x86_32.h" 55 #include "xen-x86_64.h" 78 * start of the GDT because some stupid OSes export hard-coded selector values 79 * in their ABI. These hard-coded values are always near the start of the GDT, 99 /* Maximum number of virtual CPUs in legacy multi-processor guests. */ 136 #define TI_GET_DPL(_ti) ((_ti)->flags & 3) 137 #define TI_GET_IF(_ti) ((_ti)->flags & 4) [all …]
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/openbmc/linux/arch/x86/include/asm/xen/ |
H A D | interface.h | 2 * arch-x86_32.h 24 * Copyright (c) 2004-2006, K A Fraser 104 #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>__MACH2PHYS_SHIFT) 106 /* Maximum number of virtual CPUs in multi-processor guests. */ 114 * start of the GDT because some stupid OSes export hard-coded selector values 115 * in their ABI. These hard-coded values are always near the start of the GDT, 135 #define TI_GET_DPL(_ti) ((_ti)->flags & 3) 136 #define TI_GET_IF(_ti) ((_ti)->flags & 4) 137 #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl)) 138 #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2)) [all …]
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/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_hdmi.c | 3 * Copyright © 2006-2009 Intel Corporation 64 return to_i915(hdmi_to_dig_port(intel_hdmi)->base.base.dev); in intel_hdmi_to_i915() 75 drm_WARN(&dev_priv->drm, in assert_hdmi_port_disabled() 76 intel_de_read(dev_priv, intel_hdmi->hdmi_reg) & enabled_bits, in assert_hdmi_port_disabled() 84 drm_WARN(&dev_priv->drm, in assert_hdmi_transcoder_func_disabled() 206 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in g4x_write_infoframe() 210 drm_WARN(&dev_priv->drm, !(val & VIDEO_DIP_ENABLE), in g4x_write_infoframe() 241 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in g4x_read_infoframe() 255 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in g4x_infoframes_enabled() 261 if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(encoder->port)) in g4x_infoframes_enabled() [all …]
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/openbmc/linux/drivers/scsi/ |
H A D | FlashPoint.c | 3 FlashPoint.c -- FlashPoint SCCB Manager for Linux 11 Copyright 1995-1996 by Mylex Corporation. All Rights Reserved 14 and a BSD-style copyright; see LICENSE.FlashPoint for details. 229 unsigned char niSysConf; /* Adapter Configuration byte - 231 unsigned char niScsiConf; /* SCSI Configuration byte - 233 unsigned char niScamConf; /* SCAM Configuration byte - 235 unsigned char niAdapId; /* Host Adapter ID - 276 #define TYPE_CODE0 0x63 /*Level2 Mstr (bits 7-6), */ 278 #define SLV_TYPE_CODE0 0xA3 /*Priority Bit set (bits 7-6), */ 409 #define XFER_HOST_DMA 0x00 /* 0 0 0 Transfer Host -> DMA */ [all …]
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