| /openbmc/linux/drivers/usb/cdns3/ |
| H A D | Kconfig | 2 tristate "Cadence USB Support"
7 Say Y here if your system has a Cadence USBSS or USBSSP
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
30 bool "Cadence USB3 device controller"
34 Cadence USBSS-DEV driver.
40 bool "Cadence USB3 host controller"
45 Cadence driver.
51 tristate "Cadence USB3 support on PCIe-based platforms"
62 tristate "Cadence USB3 support on TI platforms"
[all …]
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| H A D | cdnsp-trace.c | 3 * Cadence CDNSP DRD Driver.
5 * Copyright (C) 2020 Cadence.
7 * Author: Pawel Laszczak <pawell@cadence.com>
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| H A D | host.c | 3 * Cadence USBSS and USBSSP DRD Driver - host side
5 * Copyright (C) 2018-2019 Cadence Design Systems.
9 * Pawel Laszczak <pawell@cadence.com>
23 * in Cadence USB3 dual-role controller, so it can't be used
24 * with Cadence CDNSP dual-role controller.
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| H A D | core.h | 3 * Cadence USBSS and USBSSP DRD Header File.
6 * Copyright (C) 2018-2019 Cadence.
9 * Pawel Laszczak <pawell@cadence.com>
51 * struct cdns - Representation of Cadence USB3 DRD controller.
52 * @dev: pointer to Cadence device struct
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| H A D | cdns3-pci-wrap.c | 3 * Cadence USBSS PCI Glue driver
5 * Copyright (C) 2018-2019 Cadence.
7 * Author: Pawel Laszczak <pawell@cadence.com>
207 MODULE_AUTHOR("Pawel Laszczak <pawell@cadence.com>");
209 MODULE_DESCRIPTION("Cadence USBSS PCI wrapper");
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| H A D | cdnsp-pci.c | 3 * Cadence PCI Glue driver.
5 * Copyright (C) 2019 Cadence.
7 * Author: Pawel Laszczak <pawell@cadence.com>
246 MODULE_AUTHOR("Pawel Laszczak <pawell@cadence.com>");
248 MODULE_DESCRIPTION("Cadence CDNSP PCI driver");
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| H A D | drd.h | 3 * Cadence USB3 and USBSSP DRD header file.
5 * Copyright (C) 2018-2020 Cadence.
7 * Author: Pawel Laszczak <pawell@cadence.com>
82 /* CDNSP driver supports 0x000403xx Cadence USB controller family. */
85 /* CDNS3 driver supports 0x000402xx Cadence USB controller family. */
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| /openbmc/linux/drivers/phy/cadence/ |
| H A D | Kconfig | 3 # Phy drivers for Cadence PHYs
7 tristate "Cadence Torrent PHY driver"
13 Support for Cadence Torrent PHY.
16 tristate "Cadence D-PHY Support"
21 Choose this option if you have a Cadence D-PHY in your
26 tristate "Cadence D-PHY Rx Support"
31 Support for Cadence D-PHY in Rx configuration.
34 tristate "Cadence Sierra PHY Driver"
39 Enable this to support the Cadence Sierra PHY driver
42 tristate "Cadence Salvo PHY Driver"
[all …]
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| H A D | Makefile | 2 obj-$(CONFIG_PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
5 obj-$(CONFIG_PHY_CADENCE_SIERRA) += phy-cadence-sierra.o
6 obj-$(CONFIG_PHY_CADENCE_SALVO) += phy-cadence-salvo.o
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| /openbmc/linux/drivers/gpu/drm/bridge/cadence/ |
| H A D | Kconfig | 3 tristate "Cadence DPI/DSI bridge"
11 Support Cadence DPI to DSI bridge. This is an internal
17 bool "J721E Cadence DSI wrapper support"
20 Support J721E Cadence DSI wrapper. The wrapper manages
21 the routing of the DSS DPI signal to the Cadence DSI.
25 tristate "Cadence DPI/DP bridge"
33 Support Cadence DPI to DP bridge. This is an internal
42 bool "J721E Cadence DPI/DP wrapper support"
45 Support J721E Cadence DPI/DP wrapper. This is a wrapper
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| /openbmc/linux/drivers/pci/controller/cadence/ |
| H A D | Kconfig | 3 menu "Cadence-based PCIe controllers"
25 bool "Cadence platform PCIe controller (host mode)"
30 Say Y here if you want to support the Cadence PCIe platform controller in
35 bool "Cadence platform PCIe controller (endpoint mode)"
41 Say Y here if you want to support the Cadence PCIe platform controller in
55 controller in host mode. TI J721E PCIe controller uses Cadence PCIe
66 controller in endpoint mode. TI J721E PCIe controller uses Cadence PCIe
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| H A D | Makefile | 2 obj-$(CONFIG_PCIE_CADENCE) += pcie-cadence.o
3 obj-$(CONFIG_PCIE_CADENCE_HOST) += pcie-cadence-host.o
4 obj-$(CONFIG_PCIE_CADENCE_EP) += pcie-cadence-ep.o
5 obj-$(CONFIG_PCIE_CADENCE_PLAT) += pcie-cadence-plat.o
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| H A D | pcie-cadence-plat.c | 3 * Cadence PCIe platform driver.
5 * Copyright (c) 2019, Cadence Design Systems
6 * Author: Tom Joseph <tjoseph@cadence.com>
13 #include "pcie-cadence.h"
19 * @pcie: Cadence PCIe controller
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| /openbmc/linux/drivers/net/ethernet/cadence/ |
| H A D | Kconfig | 3 # Cadence device configuration
7 bool "Cadence devices"
17 remaining Cadence network card questions. If you say Y, you will be
23 tristate "Cadence MACB/GEM support"
29 The Cadence MACB ethernet interface is found on many Atmel AT32 and
30 AT91 parts. This driver also supports the Cadence GEM (Gigabit
46 tristate "Cadence PCI MACB/GEM support"
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| H A D | macb_pci.c | 3 * DOC: Cadence GEM PCI wrapper.
5 * Copyright (C) 2016 Cadence Design Systems - https://www.cadence.com
7 * Authors: Rafal Ozieblo <rafalo@cadence.com>
8 * Bartosz Folta <bfolta@cadence.com>
134 MODULE_DESCRIPTION("Cadence NIC PCI wrapper");
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| /openbmc/linux/drivers/media/platform/cadence/ |
| H A D | Kconfig | 3 comment "Cadence media platform drivers"
6 tristate "Cadence MIPI-CSI2 RX Controller"
12 Support for the Cadence MIPI CSI2 Receiver controller.
18 tristate "Cadence MIPI-CSI2 TX Controller"
24 Support for the Cadence MIPI CSI2 Transceiver controller.
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| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | phy-cadence-torrent.yaml | 4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
7 title: Cadence Torrent SD0801 PHY
10 This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
11 hardware included with the Cadence MHDP DisplayPort controller. Torrent
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
111 Refer include/dt-bindings/phy/phy-cadence.h for the constants to be used.
177 #include <dt-bindings/phy/phy-cadence.h>
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| H A D | phy-cadence-sierra.yaml | 4 $id: http://devicetree.org/schemas/phy/phy-cadence-sierra.yaml#
7 title: Cadence Sierra PHY
10 This binding describes the Cadence Sierra PHY. Sierra PHY supports multilink
14 - Swapnil Jakhade <sjakhade@cadence.com>
15 - Yuti Amonkar <yamonkar@cadence.com>
112 Refer include/dt-bindings/phy/phy-cadence.h for the constants to be used.
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| /openbmc/linux/drivers/usb/gadget/udc/cdns2/ |
| H A D | cdns2-pci.c | 3 * Cadence USBHS-DEV controller - PCI Glue driver.
5 * Copyright (C) 2023 Cadence.
7 * Author: Pawel Laszczak <pawell@cadence.com>
136 MODULE_AUTHOR("Pawel Laszczak <pawell@cadence.com>");
138 MODULE_DESCRIPTION("Cadence CDNS2 PCI driver");
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| /openbmc/linux/drivers/soundwire/ |
| H A D | Makefile | 26 #Cadence Objs
27 soundwire-cadence-y := cadence_master.o
28 obj-$(CONFIG_SOUNDWIRE_CADENCE) += soundwire-cadence.o
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| H A D | cadence_master.h | 12 * The Cadence IP supports up to 32 entries in the FIFO, though implementations
41 * struct sdw_cdns_streams: Cadence stream data structure
81 * struct sdw_cdns_dai_runtime: Cadence DAI runtime data
106 * struct sdw_cdns - Cadence driver context
116 * @registers: Cadence registers
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| /openbmc/linux/drivers/ufs/host/ |
| H A D | Kconfig | 42 tristate "Cadence UFS Controller platform driver"
45 This selects the Cadence-specific additions to UFSHCD platform driver.
110 tristate "TI glue layer for Cadence UFS Controller"
113 This selects driver for TI glue layer for Cadence UFS Host
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| H A D | cdns-pltfrm.c | 3 * Platform UFS Host driver for Cadence controller
5 * Copyright (C) 2018 Cadence Design Systems, Inc.
8 * Jan Kotas <jank@cadence.com>
198 * Disabling Autohibern8 feature in cadence UFS in cdns_ufs_link_startup_notify()
335 MODULE_AUTHOR("Jan Kotas <jank@cadence.com>");
336 MODULE_DESCRIPTION("Cadence UFS host controller platform driver");
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| /openbmc/linux/Documentation/devicetree/bindings/i2c/ |
| H A D | cdns,i2c-r1p10.yaml | 7 title: Cadence I2C controller
18 - cdns,i2c-r1p10 # cadence i2c controller version 1.0
19 - cdns,i2c-r1p14 # cadence i2c controller version 1.4
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| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | cdns,xspi.yaml | 2 # Copyright 2020-21 Cadence
8 title: Cadence XSPI Controller
11 - Parshuram Thombare <pthombar@cadence.com>
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