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/openbmc/phosphor-power/org/open_power/Witherspoon/
H A DFault.errors.yaml28 description: Read CPLD-register fail
31 description: CPLD's error reason is PSU0_PGOOD fail
34 description: CPLD's error reason is PSU1_PGOOD fail
37 description: CPLD's error reason is 240Va_Fault_A fail
40 description: CPLD's error reason is 240Va_Fault_B fail
43 description: CPLD's error reason is 240Va_Fault_C fail
46 description: CPLD's error reason is 240Va_Fault_D fail
49 description: CPLD's error reason is 240Va_Fault_E fail
52 description: CPLD's error reason is 240Va_Fault_F fail
55 description: CPLD's error reason is 240Va_Fault_G fail
[all …]
/openbmc/openbmc-test-automation/oem/nuvoton/
H A Dtest_jtag_master.robot17 Test Read CPLD ID
18 [Documentation] Test Read CPLD ID.
28 Test Program CPLD
29 [Documentation] Test Program CPLD.
32 Pass Execution If ${wrong_cpld}==1 Wrong CPLD chip
33 Pass Execution If ${program_cpld}==0 skip programming cpld
35 Program CPLD ${cpld_firmware2} ${firmware_version2}
36 Program CPLD ${cpld_firmware1} ${firmware_version1}
72 ${cpld_firmware1}= Set Variable ${olympus_json["npcm7xx"]["cpld"]["fw1"]}
73 ${cpld_firmware2}= Set Variable ${olympus_json["npcm7xx"]["cpld"]["fw2"]}
[all …]
/openbmc/phosphor-bmc-code-mgmt/cpld/
H A Dcpld.cpp1 #include "cpld.hpp"
3 namespace phosphor::software::cpld namespace
11 lg2::error("CPLD interface is not initialized"); in updateDevice()
22 lg2::error("Failed to update CPLD firmware"); in updateDevice()
27 lg2::info("Successfully updated CPLD"); in updateDevice()
36 lg2::error("CPLD interface is not initialized"); in getVersion()
43 lg2::error("Failed to get CPLD version"); in getVersion()
47 lg2::info("CPLD version: {VERSION}", "VERSION", version); in getVersion()
52 } // namespace phosphor::software::cpld
H A Dcpld_software_manager.cpp4 #include "cpld.hpp"
11 using namespace phosphor::software::cpld;
36 "CPLD device type: {TYPE} - {NAME} on Bus: {BUS} at Address: {ADDR}", in initDevice()
40 auto cpld = std::make_unique<CPLDDevice>( in initDevice() local
45 if (!(co_await cpld->getVersion(version))) in initDevice()
47 lg2::error("Failed to get CPLD version for {NAME}", "NAME", in initDevice()
51 std::unique_ptr<Software> software = std::make_unique<Software>(ctx, *cpld); in initDevice()
60 cpld->softwareCurrent = std::move(software); in initDevice()
62 devices.insert({config.objectPath, std::move(cpld)}); in initDevice()
H A DREADME.md1 # CPLD Update Daemon
3 This daemon implements the update process for CPLD attached via I2C bus.
8 lattice LCMXO3LF-4300C CPLD.
15 "CompatibleHardware": "com.meta.Hardware.Harma.CPLD.LCMXO3LF_4300C_mb",
/openbmc/openbmc/meta-ampere/meta-mitchell/recipes-ampere/platform/ampere-utils/
H A Dampere_firmware_upgrade.sh13 # Syntax for Mainboard CPLD:
16 # Syntax for BMC CPLD:
19 # Syntax for Backplane CPLD:
113 echo "Flashing MB CPLD"
124 echo "Flashing BMC CPLD"
135 echo "Flashing Front Backplane 1 CPLD"
138 echo "Flashing Front Backplane 2 CPLD"
141 echo "Flashing Front Backplane 3 CPLD"
144 echo "Flashing Rear Backplane 1 CPLD"
147 echo "Flashing Rear Backplane 2 CPLD"
[all …]
/openbmc/phosphor-bmc-code-mgmt/cpld/lattice/
H A Dinterface.cpp
/openbmc/phosphor-buttons/inc/
H A Dbutton_config.hpp3 #include "cpld.hpp"
13 cpld enumerator
22 CpldInfo cpld; // holds single cpld config member
24 // mapped with the gpio or cpld
/openbmc/u-boot/board/freescale/p2041rdb/
H A Dcpld.h11 * CPLD register set. Feel free to add board-specific #ifdefs where necessary.
14 u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */
15 u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */
44 /* Pointer to the CPLD register set */
45 #define cpld ((cpld_data_t *)CPLD_BASE) macro
47 /* The CPLD SW register that corresponds to board switch X, where x >= 1 */
48 #define CPLD_SW(x) (cpld->sw[(x) - 2])
/openbmc/linux/arch/powerpc/platforms/85xx/
Dksi8560.c
/openbmc/u-boot/board/freescale/t4rdb/
H A Dcpld.c7 * This file provides support for the board-specific CPLD used on some Freescale
13 * CPLD register map
21 #include "cpld.h"
57 printf("CPLD Altbank Fail: Invalid value!\n"); in cpld_set_altbank()
121 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
124 "cpld reset altbank - reset to alternate bank\n"
126 "cpld dump - display the CPLD registers\n"
H A Dcpld.h12 * CPLD register set. Feel free to add board-specific #ifdefs where necessary.
15 u8 chip_id1; /* 0x00 - CPLD Chip ID1 Register */
16 u8 chip_id2; /* 0x01 - CPLD Chip ID2 Register */
17 u8 sw_maj_ver; /* 0x02 - CPLD Code Major Version Register */
18 u8 sw_min_ver; /* 0x03 - CPLD Code Minor Version Register */
40 /* Pointer to the CPLD register set */
/openbmc/openbmc/meta-ampere/meta-jefferson/recipes-ampere/platform/ampere-utils/
H A Dampere_firmware_upgrade.sh12 # Syntax for Mainboard CPLD:
15 # Syntax for BMC CPLD:
93 echo "Flashing MB CPLD"
104 echo "Flashing BMC CPLD"
119 echo " - Flash Mainboard CPLD"
121 echo " - Flash BMC CPLD (only for DC-SCM BMC board)"
141 # Run Mainboard CPLD update
144 # Run CPLD BMC update
/openbmc/u-boot/board/freescale/t104xrdb/
H A Dcpld.c5 * This file provides support for the board-specific CPLD used on some Freescale
10 * CONFIG_SYS_CPLD_BASE-The virtual address of the base of the CPLD register map
17 #include "cpld.h"
108 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
111 "cpld reset altbank - reset to alternate bank\n"
113 "cpld dump - display the CPLD registers\n"
/openbmc/u-boot/board/LaCie/net2big_v2/
H A Dnet2big_v2.c23 #include "../common/cpld-gpio-bus.h"
55 MPP29_GPIO, /* CPLD GPIO bus ALE */ in board_early_init_f()
61 MPP44_GPIO, /* CPLD GPIO bus (data 0) */ in board_early_init_f()
62 MPP45_GPIO, /* CPLD GPIO bus (data 1) */ in board_early_init_f()
63 MPP46_GPIO, /* CPLD GPIO bus (data 2) */ in board_early_init_f()
64 MPP47_GPIO, /* CPLD GPIO bus (addr 0) */ in board_early_init_f()
65 MPP48_GPIO, /* CPLD GPIO bus (addr 1) */ in board_early_init_f()
66 MPP49_GPIO, /* CPLD GPIO bus (addr 2) */ in board_early_init_f()
139 * CPLD GPIO bus:
159 * The LEDs are controlled by a CPLD and can be configured through
[all …]
/openbmc/openbmc/meta-quanta/meta-gbs/recipes-gbs/cpld-ver-check/
H A Dgbs-cpld-ver-check.bb1 DESCRIPTION = "Report CPLD Version"
9 file://cpld-version.service \
18 SYSTEMD_SERVICE:${PN} = "cpld-version.service"
25 install -m 0644 ${S}/cpld-version.service ${D}${systemd_system_unitdir}
/openbmc/u-boot/board/freescale/ls1043ardb/
H A Dcpld.c5 * Freescale LS1043ARDB board-specific CPLD controlling supports.
11 #include "cpld.h"
164 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
167 "cpld reset altbank: reset to alternate bank\n"
168 "cpld reset nand: reset to boot from NAND flash\n"
169 "cpld reset sd: reset to boot from SD card\n"
171 "cpld dump - display the CPLD registers\n"
/openbmc/u-boot/board/freescale/ls1046ardb/
H A Dcpld.h10 * CPLD register set of LS1046ARDB board-specific.
11 * CPLD Revision: V2.1
14 u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */
15 u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */
43 /* CPLD on IFC */
H A Dcpld.c5 * Freescale LS1046ARDB board-specific CPLD controlling supports.
11 #include "cpld.h"
158 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
161 "cpld reset altbank: reset to alternate bank\n"
162 "cpld reset sd: reset to boot from SD card\n"
164 "cpld dump - display the CPLD registers\n"
/openbmc/phosphor-power/power-sequencer/
H A Dmihawk-cpld.hpp20 * This class implements fault analysis for Mihawk's CPLD
63 * to read CPLD-error-code-register
68 * ex.Mihawk's CPLD-register is on slaveAddr ox40 of
74 * CPLD-error-code-register.
80 * CPLD-power_on-error-interrupt-bit-register
88 * Clear CPLD intrupt record after reading CPLD_register.
94 * CPLD-power_ready-error-interrupt-bit-register
117 * The parameter which is checked CPLD's the same error
126 * which are read on CPLD-error-code-register.
130 * Read CPLD-error-code-register fail.
/openbmc/u-boot/board/freescale/t102xrdb/
H A Dcpld.c5 * Freescale T1024RDB board-specific CPLD controlling supports.
13 #include "cpld.h"
97 cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
100 "cpld reset altbank - reset to alternate bank\n"
101 "cpld dump - display the CPLD registers\n"
/openbmc/u-boot/board/renesas/ulcb/
H A Dcpld.c3 * ULCB board CPLD access support
98 printf("CPLD version:\t\t\t0x%08x\n", in do_cpld()
116 printf("Invalid CPLD register address\n"); in do_cpld()
131 cpld, 4, 1, do_cpld,
132 "CPLD access",
134 "cpld read addr\n"
135 "cpld write addr val\n"
179 { .compatible = "renesas,ulcb-cpld" },
/openbmc/openbmc/meta-fii/meta-mori/recipes-mori/mori-fw-utility/mori-fw/
H A Dmori-fw.sh37 echo "Image file" "$1" "is empty or nonexistent, BMC CPLD update failed"
53 echo "BMC CPLD update failed"
56 echo "BMC CPLD update successful"
65 echo "Image file" "$1" "is empty or nonexistent, MB CPLD update failed"
80 echo "MB CPLD update failed"
83 echo "MB CPLD update successful"
87 echo "MB CPLD update successful"
/openbmc/u-boot/board/renesas/stout/
H A Dcpld.c3 * Stout board CPLD access support
13 #include "cpld.h"
106 printf("CPLD version: 0x%08x\n", in cpld_init()
137 printf("cpld invalid addr\n"); in do_cpld()
157 cpld, 4, 1, do_cpld,
158 "CPLD access",
160 "cpld write addr val\n"
/openbmc/u-boot/board/LaCie/common/
H A Dcpld-gpio-bus.c3 * cpld-gpio-bus.c: provides support for the CPLD GPIO bus found on some LaCie
6 * up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that
15 #include "cpld-gpio-bus.h"

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