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Searched full:cpen (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/s390/crypto/
H A Dzcrypt_api.c648 int cpen, qpen, qid = 0, rc = -ENODEV; in zcrypt_rsa_modexpo() local
690 cpen = (tr && tr->again_counter && tr->last_qid && in zcrypt_rsa_modexpo()
693 if (!zcrypt_card_compare(zc, pref_zc, wgt + cpen, pref_wgt)) in zcrypt_rsa_modexpo()
709 wgt + cpen + qpen, pref_wgt)) in zcrypt_rsa_modexpo()
713 pref_wgt = wgt + cpen + qpen; in zcrypt_rsa_modexpo()
753 int cpen, qpen, qid = 0, rc = -ENODEV; in zcrypt_rsa_crt() local
795 cpen = (tr && tr->again_counter && tr->last_qid && in zcrypt_rsa_crt()
798 if (!zcrypt_card_compare(zc, pref_zc, wgt + cpen, pref_wgt)) in zcrypt_rsa_crt()
814 wgt + cpen + qpen, pref_wgt)) in zcrypt_rsa_crt()
818 pref_wgt = wgt + cpen + qpen; in zcrypt_rsa_crt()
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/openbmc/linux/drivers/extcon/
H A Dextcon-max8997.c216 ctrl2 |= CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max8997_muic_set_path()
218 ctrl2 |= CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max8997_muic_set_path()
H A Dextcon-max14577.c224 ctrl2 |= CTRL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max14577_muic_set_path()
226 ctrl2 |= CTRL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max14577_muic_set_path()
H A Dextcon-max77693.c276 ctrl2 |= MAX77693_CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max77693_muic_set_path()
278 ctrl2 |= MAX77693_CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max77693_muic_set_path()
/openbmc/linux/drivers/usb/musb/
H A Dmpfs.c81 * HDRC controls CPEN, but beware current surges during device in mpfs_musb_set_vbus()
H A Dux500.c38 /* HDRC controls CPEN, but beware current surges during device in ux500_musb_set_vbus()
H A Domap2430.c85 * HDRC controls CPEN, but beware current surges during device connect.
H A Dtusb6010.c563 /* HDRC controls CPEN, but beware current surges during device in tusb_musb_set_vbus()
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dsnps,dwc3.yaml271 the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL
/openbmc/linux/arch/alpha/include/asm/
H A Dcore_titan.h71 titan_64 cpen; member
/openbmc/linux/sound/pci/oxygen/
H A Dxonar_cs43xx.c105 /* set CPEN (control port mode) and power down */ in cs43xx_registers_init()
/openbmc/qemu/hw/acpi/
H A Dcpu.c331 #define CPU_ENABLED "CPEN"
/openbmc/linux/drivers/usb/dwc3/
H A Dcore.h1119 * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
H A Dcore.c749 * the CPEN pin requires the configuration of the ULPI DRVVBUSEXTERNAL in dwc3_phy_setup()