| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 26 #define CLK_SCLK_MMC0 132 macro
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| H A D | exynos5250.h | 36 #define CLK_SCLK_MMC0 139 macro
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| H A D | exynos7-clk.h | 61 #define CLK_SCLK_MMC0 8 macro
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| H A D | exynos5420.h | 33 #define CLK_SCLK_MMC0 132 macro
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| H A D | exynos4.h | 58 #define CLK_SCLK_MMC0 145 macro
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| H A D | exynos3250.h | 249 #define CLK_SCLK_MMC0 241 macro
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| H A D | exynos5433.h | 560 #define CLK_SCLK_MMC0 63 macro
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| /openbmc/linux/Documentation/devicetree/bindings/mmc/ |
| H A D | samsung,s3c6410-sdhci.yaml | 74 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | exynos7420-clk.h | 64 #define CLK_SCLK_MMC0 8 macro
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5410.c | 175 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0",
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| H A D | clk-exynos5250.c | 478 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0",
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| H A D | clk-exynos7.c | 534 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_sclk_mmc0",
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| H A D | clk-exynos3250.c | 555 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc0_pre",
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| H A D | clk-exynos4.c | 771 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0", SRC_MASK_FSYS, 0,
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| H A D | clk-exynos5420.c | 1009 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_mmc0",
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| H A D | clk-exynos5433.c | 2342 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "mout_sclk_mmc0_user",
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| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5410.dtsi | 132 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
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| H A D | exynos3250.dtsi | 555 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
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| H A D | exynos4.dtsi | 322 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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| H A D | exynos5250.dtsi | 552 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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| H A D | exynos5420.dtsi | 318 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
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| /openbmc/linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos7.dtsi | 580 <&clock_top1 CLK_SCLK_MMC0>;
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| H A D | exynos5433.dtsi | 1829 <&cmu_fsys CLK_SCLK_MMC0>;
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