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Searched full:clk_out (Results 1 – 25 of 36) sorted by relevance

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/openbmc/linux/drivers/clk/
H A Dclk-versaclock5.c132 /* Maximum number of clk_out supported by this driver */
198 struct vc5_out_data clk_out[VC5_MAX_CLK_OUT_NUM]; member
743 return &vc5->clk_out[idx].hw; in vc5_of_clk_get()
764 struct vc5_out_data *clk_out) in vc5_update_mode() argument
769 clk_out->clk_output_cfg0_mask |= VC5_CLK_OUTPUT_CFG0_CFG_MASK; in vc5_update_mode()
778 clk_out->clk_output_cfg0 |= in vc5_update_mode()
789 struct vc5_out_data *clk_out) in vc5_update_power() argument
795 clk_out->clk_output_cfg0_mask |= VC5_CLK_OUTPUT_CFG0_PWR_MASK; in vc5_update_power()
798 clk_out->clk_output_cfg0 |= VC5_CLK_OUTPUT_CFG0_PWR_18; in vc5_update_power()
801 clk_out->clk_output_cfg0 |= VC5_CLK_OUTPUT_CFG0_PWR_25; in vc5_update_power()
[all …]
H A Dclk-versaclock3.c211 static struct clk_hw *clk_out[6]; variable
987 if (idx >= ARRAY_SIZE(clk_out)) { in vc3_of_clk_get()
1083 for (i = 0; i < ARRAY_SIZE(clk_out); i++) { in vc3_probe()
1108 clk_out[i] = devm_clk_hw_register_fixed_factor_index(dev, in vc3_probe()
1111 clk_out[i] = devm_clk_hw_register_fixed_factor_parent_hw(dev, in vc3_probe()
1114 if (IS_ERR(clk_out[i])) in vc3_probe()
1115 return PTR_ERR(clk_out[i]); in vc3_probe()
1118 ret = devm_of_clk_add_hw_provider(dev, vc3_of_clk_get, clk_out); in vc3_probe()
H A Dclk-versaclock7.c163 struct vc7_out_data clk_out[VC7_NUM_OUT]; member
186 return &vc7->clk_out[idx].hw; in vc7_of_clk_get()
702 vc7->clk_out[idx].out_dis = val & VC7_REG_OUT_DIS; in vc7_read_output()
716 vc7->clk_out[idx].out_dis); in vc7_write_output()
1212 vc7->clk_out[i].num = i; in vc7_probe()
1213 vc7->clk_out[i].vc7 = vc7; in vc7_probe()
1214 vc7->clk_out[i].hw.init = &clk_init; in vc7_probe()
1215 ret = devm_clk_hw_register(&client->dev, &vc7->clk_out[i].hw); in vc7_probe()
H A Dclk-cs2000-cp.c193 /* enable both AUX_OUT, CLK_OUT */ in cs2000_clk_out_enable()
/openbmc/linux/sound/soc/rockchip/
H A Drockchip_pdm.c44 unsigned int clk_out; member
79 unsigned int *clk_src, unsigned int *clk_out) in get_pdm_clk() argument
93 *clk_out = clkref[i].clk_out; in get_pdm_clk()
203 unsigned int clk_src, clk_out = 0; in rockchip_pdm_hw_params() local
212 clk_rate = get_pdm_clk(pdm, samplerate, &clk_src, &clk_out); in rockchip_pdm_hw_params()
222 rational_best_approximation(clk_out, clk_src, in rockchip_pdm_hw_params()
251 val = get_pdm_cic_ratio(clk_out); in rockchip_pdm_hw_params()
/openbmc/linux/drivers/clk/zynqmp/
H A Dclkc.c592 char *clk_out[MAX_NODES]; in zynqmp_register_clk_topology() local
606 clk_out[j] = kasprintf(GFP_KERNEL, "%s%s", clk_name, in zynqmp_register_clk_topology()
609 clk_out[j] = kasprintf(GFP_KERNEL, "%s", clk_name); in zynqmp_register_clk_topology()
615 hw = (*clk_topology[nodes[j].type])(clk_out[j], clk_dev_id, in zynqmp_register_clk_topology()
624 parent_names[0] = clk_out[j]; in zynqmp_register_clk_topology()
628 kfree(clk_out[j]); in zynqmp_register_clk_topology()
/openbmc/qemu/docs/devel/
H A Dclocks.rst89 qdev_init_clock_out(DEVICE(dev), "clk_out");
110 Clock *clk_out;
124 * + a clock output named "clk_out" whose pointer is stored in
125 * the clk_out field of a MyDeviceState structure.
129 QDEV_CLOCK_OUT(MyDeviceState, clk_out),
212 Clock *clk = qdev_get_clock_out(DEVICE(mydev), "clk_out");
/openbmc/linux/drivers/media/dvb-frontends/
H A Dm88ds3103.h57 * @clk_out: Clock output.
71 enum m88ds3103_clock_out clk_out; member
H A Dts2020.c30 u8 clk_out:2; member
112 switch (priv->clk_out) { in ts2020_init()
591 dev->clk_out = pdata->clk_out; in ts2020_probe()
648 switch (dev->clk_out) { in ts2020_probe()
H A Dts2020.h30 u8 clk_out:2; member
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dti,dp83867.yaml74 Muxing option for CLK_OUT pin. See dt-bindings/net/ti-dp83867.h
75 for applicable values. The CLK_OUT pin can also be disabled by this
H A Dti,dp83869.yaml59 Muxing option for CLK_OUT pin see dt-bindings/net/ti-dp83869.h for values.
/openbmc/linux/drivers/clk/samsung/
H A Dclk-s5pv210.c62 #define CLK_OUT 0x0500 macro
125 CLK_OUT,
428 MUX(MOUT_CLKSEL, "mout_clksel", mout_clksel_p, CLK_OUT, 12, 5),
460 MUX(MOUT_CLKSEL, "mout_clksel", mout_clksel_6442_p, CLK_OUT, 12, 5),
505 DIV(DOUT_CLKOUT, "dout_clkout", "mout_clksel", CLK_OUT, 20, 4),
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dcirrus,cs2000-cp.yaml46 - 2 # CS2000CP_AUX_OUTPUT_CLK_OUT: clk_out output
/openbmc/u-boot/board/samsung/smdkc100/
H A Dlowlevel_init.S111 str r1, [r8, #0x400] @ CLK_OUT
/openbmc/linux/sound/soc/uniphier/
H A Daio.h274 int clk_out; member
/openbmc/linux/drivers/media/usb/dvb-usb-v2/
H A Ddvbsky.c285 m88ds3103_pdata.clk_out = 0; in dvbsky_s960_attach()
388 m88ds3103_pdata.clk_out = 0; in dvbsky_s960c_attach()
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_ti814x.c256 * clk_out = clkout_dco/m2; in pll_config()
/openbmc/linux/drivers/video/fbdev/
H A Dpxa168fb.c235 * clk_out = clk2 * (1 - (fractional_divider >> 12))
238 * and clk_out.
/openbmc/linux/drivers/gpu/drm/tegra/
H A Dsor.c417 struct clk *clk_out; member
506 err = clk_set_parent(sor->clk_out, parent); in tegra_sor_set_parent_clock()
3842 sor->clk_out = devm_clk_get(&pdev->dev, name); in tegra_sor_probe()
3843 if (IS_ERR(sor->clk_out)) { in tegra_sor_probe()
3844 err = PTR_ERR(sor->clk_out); in tegra_sor_probe()
3851 sor->clk_out = sor->clk; in tegra_sor_probe()
3899 err = clk_set_parent(sor->clk_out, sor->clk_safe); in tegra_sor_probe()
/openbmc/linux/drivers/staging/pi433/
H A Drf69_registers.h361 /* RegDioMapping2 CLK_OUT part */
/openbmc/linux/drivers/ufs/host/
H A Dufs-qcom.c205 const char *name, struct clk **clk_out, bool optional) in ufs_qcom_host_clk_get() argument
212 *clk_out = clk; in ufs_qcom_host_clk_get()
219 *clk_out = NULL; in ufs_qcom_host_clk_get()
H A Dufs-mediatek.c464 struct clk **clk_out) in ufs_mtk_get_host_clk() argument
473 *clk_out = clk; in ufs_mtk_get_host_clk()
/openbmc/u-boot/board/freescale/lx2160a/
H A Dlx2160a.c321 * CLK_OUT connects to FPGA for clock measurement. in config_board_mux()
/openbmc/linux/Documentation/devicetree/bindings/arm/marvell/
H A Dcp110-system-controller.txt103 mpp12 12 gpio, dev(clk_out), nf(rbn1), spi1(csn1), ge0(rxclk)

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