1be5418d4SNishad Kamdar /* SPDX-License-Identifier: GPL-2.0+ */ 2be5418d4SNishad Kamdar /* 3874bcba6SMarcus Wolf * register description for HopeRf rf69 radio module 4874bcba6SMarcus Wolf * 5874bcba6SMarcus Wolf * Copyright (C) 2016 Wolf-Entwicklungen 6874bcba6SMarcus Wolf * Marcus Wolf <linux@wolf-entwicklungen.de> 7874bcba6SMarcus Wolf */ 8874bcba6SMarcus Wolf 9874bcba6SMarcus Wolf /*******************************************/ 10874bcba6SMarcus Wolf /* RF69 register addresses */ 11874bcba6SMarcus Wolf /*******************************************/ 12874bcba6SMarcus Wolf #define REG_FIFO 0x00 13874bcba6SMarcus Wolf #define REG_OPMODE 0x01 14874bcba6SMarcus Wolf #define REG_DATAMODUL 0x02 15874bcba6SMarcus Wolf #define REG_BITRATE_MSB 0x03 16874bcba6SMarcus Wolf #define REG_BITRATE_LSB 0x04 17874bcba6SMarcus Wolf #define REG_FDEV_MSB 0x05 18874bcba6SMarcus Wolf #define REG_FDEV_LSB 0x06 19874bcba6SMarcus Wolf #define REG_FRF_MSB 0x07 20874bcba6SMarcus Wolf #define REG_FRF_MID 0x08 21874bcba6SMarcus Wolf #define REG_FRF_LSB 0x09 22874bcba6SMarcus Wolf #define REG_OSC1 0x0A 23874bcba6SMarcus Wolf #define REG_AFCCTRL 0x0B 24874bcba6SMarcus Wolf #define REG_LOWBAT 0x0C 25874bcba6SMarcus Wolf #define REG_LISTEN1 0x0D 26874bcba6SMarcus Wolf #define REG_LISTEN2 0x0E 27874bcba6SMarcus Wolf #define REG_LISTEN3 0x0F 28874bcba6SMarcus Wolf #define REG_VERSION 0x10 29874bcba6SMarcus Wolf #define REG_PALEVEL 0x11 30874bcba6SMarcus Wolf #define REG_PARAMP 0x12 31874bcba6SMarcus Wolf #define REG_OCP 0x13 32874bcba6SMarcus Wolf #define REG_AGCREF 0x14 /* not available on RF69 */ 33874bcba6SMarcus Wolf #define REG_AGCTHRESH1 0x15 /* not available on RF69 */ 34874bcba6SMarcus Wolf #define REG_AGCTHRESH2 0x16 /* not available on RF69 */ 35874bcba6SMarcus Wolf #define REG_AGCTHRESH3 0x17 /* not available on RF69 */ 36874bcba6SMarcus Wolf #define REG_LNA 0x18 37874bcba6SMarcus Wolf #define REG_RXBW 0x19 38874bcba6SMarcus Wolf #define REG_AFCBW 0x1A 39874bcba6SMarcus Wolf #define REG_OOKPEAK 0x1B 40874bcba6SMarcus Wolf #define REG_OOKAVG 0x1C 41874bcba6SMarcus Wolf #define REG_OOKFIX 0x1D 42874bcba6SMarcus Wolf #define REG_AFCFEI 0x1E 43874bcba6SMarcus Wolf #define REG_AFCMSB 0x1F 44874bcba6SMarcus Wolf #define REG_AFCLSB 0x20 45874bcba6SMarcus Wolf #define REG_FEIMSB 0x21 46874bcba6SMarcus Wolf #define REG_FEILSB 0x22 47874bcba6SMarcus Wolf #define REG_RSSICONFIG 0x23 48874bcba6SMarcus Wolf #define REG_RSSIVALUE 0x24 49874bcba6SMarcus Wolf #define REG_DIOMAPPING1 0x25 50874bcba6SMarcus Wolf #define REG_DIOMAPPING2 0x26 51874bcba6SMarcus Wolf #define REG_IRQFLAGS1 0x27 52874bcba6SMarcus Wolf #define REG_IRQFLAGS2 0x28 53874bcba6SMarcus Wolf #define REG_RSSITHRESH 0x29 54874bcba6SMarcus Wolf #define REG_RXTIMEOUT1 0x2A 55874bcba6SMarcus Wolf #define REG_RXTIMEOUT2 0x2B 56874bcba6SMarcus Wolf #define REG_PREAMBLE_MSB 0x2C 57874bcba6SMarcus Wolf #define REG_PREAMBLE_LSB 0x2D 58874bcba6SMarcus Wolf #define REG_SYNC_CONFIG 0x2E 59874bcba6SMarcus Wolf #define REG_SYNCVALUE1 0x2F 60874bcba6SMarcus Wolf #define REG_SYNCVALUE2 0x30 61874bcba6SMarcus Wolf #define REG_SYNCVALUE3 0x31 62874bcba6SMarcus Wolf #define REG_SYNCVALUE4 0x32 63874bcba6SMarcus Wolf #define REG_SYNCVALUE5 0x33 64874bcba6SMarcus Wolf #define REG_SYNCVALUE6 0x34 65874bcba6SMarcus Wolf #define REG_SYNCVALUE7 0x35 66874bcba6SMarcus Wolf #define REG_SYNCVALUE8 0x36 67874bcba6SMarcus Wolf #define REG_PACKETCONFIG1 0x37 68874bcba6SMarcus Wolf #define REG_PAYLOAD_LENGTH 0x38 69874bcba6SMarcus Wolf #define REG_NODEADRS 0x39 70874bcba6SMarcus Wolf #define REG_BROADCASTADRS 0x3A 71874bcba6SMarcus Wolf #define REG_AUTOMODES 0x3B 72874bcba6SMarcus Wolf #define REG_FIFO_THRESH 0x3C 73874bcba6SMarcus Wolf #define REG_PACKETCONFIG2 0x3D 74874bcba6SMarcus Wolf #define REG_AESKEY1 0x3E 75874bcba6SMarcus Wolf #define REG_AESKEY2 0x3F 76874bcba6SMarcus Wolf #define REG_AESKEY3 0x40 77874bcba6SMarcus Wolf #define REG_AESKEY4 0x41 78874bcba6SMarcus Wolf #define REG_AESKEY5 0x42 79874bcba6SMarcus Wolf #define REG_AESKEY6 0x43 80874bcba6SMarcus Wolf #define REG_AESKEY7 0x44 81874bcba6SMarcus Wolf #define REG_AESKEY8 0x45 82874bcba6SMarcus Wolf #define REG_AESKEY9 0x46 83874bcba6SMarcus Wolf #define REG_AESKEY10 0x47 84874bcba6SMarcus Wolf #define REG_AESKEY11 0x48 85874bcba6SMarcus Wolf #define REG_AESKEY12 0x49 86874bcba6SMarcus Wolf #define REG_AESKEY13 0x4A 87874bcba6SMarcus Wolf #define REG_AESKEY14 0x4B 88874bcba6SMarcus Wolf #define REG_AESKEY15 0x4C 89874bcba6SMarcus Wolf #define REG_AESKEY16 0x4D 90874bcba6SMarcus Wolf #define REG_TEMP1 0x4E 91874bcba6SMarcus Wolf #define REG_TEMP2 0x4F 92*6c73edb5SPaulo Miguel Almeida #define REG_TESTLNA 0x58 93874bcba6SMarcus Wolf #define REG_TESTPA1 0x5A /* only present on RFM69HW */ 94874bcba6SMarcus Wolf #define REG_TESTPA2 0x5C /* only present on RFM69HW */ 95874bcba6SMarcus Wolf #define REG_TESTDAGC 0x6F 96*6c73edb5SPaulo Miguel Almeida #define REG_TESTAFC 0x71 97874bcba6SMarcus Wolf 98874bcba6SMarcus Wolf /******************************************************/ 99874bcba6SMarcus Wolf /* RF69/SX1231 bit definition */ 100874bcba6SMarcus Wolf /******************************************************/ 101874bcba6SMarcus Wolf /* write bit */ 102874bcba6SMarcus Wolf #define WRITE_BIT 0x80 103874bcba6SMarcus Wolf 104874bcba6SMarcus Wolf /* RegOpMode */ 105874bcba6SMarcus Wolf #define MASK_OPMODE_SEQUENCER_OFF 0x80 106874bcba6SMarcus Wolf #define MASK_OPMODE_LISTEN_ON 0x40 107874bcba6SMarcus Wolf #define MASK_OPMODE_LISTEN_ABORT 0x20 108874bcba6SMarcus Wolf #define MASK_OPMODE_MODE 0x1C 109874bcba6SMarcus Wolf 110874bcba6SMarcus Wolf #define OPMODE_MODE_SLEEP 0x00 111874bcba6SMarcus Wolf #define OPMODE_MODE_STANDBY 0x04 /* default */ 112874bcba6SMarcus Wolf #define OPMODE_MODE_SYNTHESIZER 0x08 113874bcba6SMarcus Wolf #define OPMODE_MODE_TRANSMIT 0x0C 114874bcba6SMarcus Wolf #define OPMODE_MODE_RECEIVE 0x10 115874bcba6SMarcus Wolf 116874bcba6SMarcus Wolf /* RegDataModul */ 117874bcba6SMarcus Wolf #define MASK_DATAMODUL_MODE 0x06 118874bcba6SMarcus Wolf #define MASK_DATAMODUL_MODULATION_TYPE 0x18 119874bcba6SMarcus Wolf #define MASK_DATAMODUL_MODULATION_SHAPE 0x03 120874bcba6SMarcus Wolf 121874bcba6SMarcus Wolf #define DATAMODUL_MODE_PACKET 0x00 /* default */ 122874bcba6SMarcus Wolf #define DATAMODUL_MODE_CONTINUOUS 0x40 123874bcba6SMarcus Wolf #define DATAMODUL_MODE_CONTINUOUS_NOSYNC 0x60 124874bcba6SMarcus Wolf 125874bcba6SMarcus Wolf #define DATAMODUL_MODULATION_TYPE_FSK 0x00 /* default */ 126874bcba6SMarcus Wolf #define DATAMODUL_MODULATION_TYPE_OOK 0x08 127874bcba6SMarcus Wolf 128874bcba6SMarcus Wolf #define DATAMODUL_MODULATION_SHAPE_NONE 0x00 /* default */ 129874bcba6SMarcus Wolf #define DATAMODUL_MODULATION_SHAPE_1_0 0x01 130874bcba6SMarcus Wolf #define DATAMODUL_MODULATION_SHAPE_0_5 0x02 131874bcba6SMarcus Wolf #define DATAMODUL_MODULATION_SHAPE_0_3 0x03 132874bcba6SMarcus Wolf #define DATAMODUL_MODULATION_SHAPE_BR 0x01 133874bcba6SMarcus Wolf #define DATAMODUL_MODULATION_SHAPE_2BR 0x02 134874bcba6SMarcus Wolf 135874bcba6SMarcus Wolf /* RegFDevMsb (0x05)*/ 136874bcba6SMarcus Wolf #define FDEVMASB_MASK 0x3f 137874bcba6SMarcus Wolf 138874bcba6SMarcus Wolf /* 139056eeda2SDerek Robson * // RegOsc1 140056eeda2SDerek Robson * #define OSC1_RCCAL_START 0x80 141056eeda2SDerek Robson * #define OSC1_RCCAL_DONE 0x40 142056eeda2SDerek Robson * 143056eeda2SDerek Robson * // RegLowBat 144056eeda2SDerek Robson * #define LOWBAT_MONITOR 0x10 145056eeda2SDerek Robson * #define LOWBAT_ON 0x08 146056eeda2SDerek Robson * #define LOWBAT_OFF 0x00 // Default 147056eeda2SDerek Robson * 148056eeda2SDerek Robson * #define LOWBAT_TRIM_1695 0x00 149056eeda2SDerek Robson * #define LOWBAT_TRIM_1764 0x01 150056eeda2SDerek Robson * #define LOWBAT_TRIM_1835 0x02 // Default 151056eeda2SDerek Robson * #define LOWBAT_TRIM_1905 0x03 152056eeda2SDerek Robson * #define LOWBAT_TRIM_1976 0x04 153056eeda2SDerek Robson * #define LOWBAT_TRIM_2045 0x05 154056eeda2SDerek Robson * #define LOWBAT_TRIM_2116 0x06 155056eeda2SDerek Robson * #define LOWBAT_TRIM_2185 0x07 156056eeda2SDerek Robson * 157056eeda2SDerek Robson * 158056eeda2SDerek Robson * // RegListen1 159056eeda2SDerek Robson * #define LISTEN1_RESOL_64 0x50 160056eeda2SDerek Robson * #define LISTEN1_RESOL_4100 0xA0 // Default 161056eeda2SDerek Robson * #define LISTEN1_RESOL_262000 0xF0 162056eeda2SDerek Robson * 163056eeda2SDerek Robson * #define LISTEN1_CRITERIA_RSSI 0x00 // Default 164056eeda2SDerek Robson * #define LISTEN1_CRITERIA_RSSIANDSYNC 0x08 165056eeda2SDerek Robson * 166056eeda2SDerek Robson * #define LISTEN1_END_00 0x00 167056eeda2SDerek Robson * #define LISTEN1_END_01 0x02 // Default 168056eeda2SDerek Robson * #define LISTEN1_END_10 0x04 169056eeda2SDerek Robson * 170056eeda2SDerek Robson * 171056eeda2SDerek Robson * // RegListen2 172056eeda2SDerek Robson * #define LISTEN2_COEFIDLE_VALUE 0xF5 // Default 173056eeda2SDerek Robson * 174056eeda2SDerek Robson * // RegListen3 175056eeda2SDerek Robson * #define LISTEN3_COEFRX_VALUE 0x20 // Default 176874bcba6SMarcus Wolf */ 177874bcba6SMarcus Wolf 178874bcba6SMarcus Wolf // RegPaLevel 179874bcba6SMarcus Wolf #define MASK_PALEVEL_PA0 0x80 180874bcba6SMarcus Wolf #define MASK_PALEVEL_PA1 0x40 181874bcba6SMarcus Wolf #define MASK_PALEVEL_PA2 0x20 182874bcba6SMarcus Wolf #define MASK_PALEVEL_OUTPUT_POWER 0x1F 183874bcba6SMarcus Wolf 184874bcba6SMarcus Wolf // RegPaRamp 185874bcba6SMarcus Wolf #define PARAMP_3400 0x00 186874bcba6SMarcus Wolf #define PARAMP_2000 0x01 187874bcba6SMarcus Wolf #define PARAMP_1000 0x02 188874bcba6SMarcus Wolf #define PARAMP_500 0x03 189874bcba6SMarcus Wolf #define PARAMP_250 0x04 190874bcba6SMarcus Wolf #define PARAMP_125 0x05 191874bcba6SMarcus Wolf #define PARAMP_100 0x06 192874bcba6SMarcus Wolf #define PARAMP_62 0x07 193874bcba6SMarcus Wolf #define PARAMP_50 0x08 194874bcba6SMarcus Wolf #define PARAMP_40 0x09 /* default */ 195874bcba6SMarcus Wolf #define PARAMP_31 0x0A 196874bcba6SMarcus Wolf #define PARAMP_25 0x0B 197874bcba6SMarcus Wolf #define PARAMP_20 0x0C 198874bcba6SMarcus Wolf #define PARAMP_15 0x0D 199874bcba6SMarcus Wolf #define PARAMP_12 0x0E 200874bcba6SMarcus Wolf #define PARAMP_10 0x0F 201874bcba6SMarcus Wolf 202874bcba6SMarcus Wolf #define MASK_PARAMP 0x0F 203874bcba6SMarcus Wolf 204874bcba6SMarcus Wolf /* 205056eeda2SDerek Robson * // RegOcp 206056eeda2SDerek Robson * #define OCP_OFF 0x0F 207056eeda2SDerek Robson * #define OCP_ON 0x1A // Default 208056eeda2SDerek Robson * 209056eeda2SDerek Robson * #define OCP_TRIM_45 0x00 210056eeda2SDerek Robson * #define OCP_TRIM_50 0x01 211056eeda2SDerek Robson * #define OCP_TRIM_55 0x02 212056eeda2SDerek Robson * #define OCP_TRIM_60 0x03 213056eeda2SDerek Robson * #define OCP_TRIM_65 0x04 214056eeda2SDerek Robson * #define OCP_TRIM_70 0x05 215056eeda2SDerek Robson * #define OCP_TRIM_75 0x06 216056eeda2SDerek Robson * #define OCP_TRIM_80 0x07 217056eeda2SDerek Robson * #define OCP_TRIM_85 0x08 218056eeda2SDerek Robson * #define OCP_TRIM_90 0x09 219056eeda2SDerek Robson * #define OCP_TRIM_95 0x0A 220056eeda2SDerek Robson * #define OCP_TRIM_100 0x0B // Default 221056eeda2SDerek Robson * #define OCP_TRIM_105 0x0C 222056eeda2SDerek Robson * #define OCP_TRIM_110 0x0D 223056eeda2SDerek Robson * #define OCP_TRIM_115 0x0E 224056eeda2SDerek Robson * #define OCP_TRIM_120 0x0F 225874bcba6SMarcus Wolf */ 226874bcba6SMarcus Wolf 227874bcba6SMarcus Wolf /* RegLna (0x18) */ 228874bcba6SMarcus Wolf #define MASK_LNA_ZIN 0x80 229874bcba6SMarcus Wolf #define MASK_LNA_CURRENT_GAIN 0x38 230874bcba6SMarcus Wolf #define MASK_LNA_GAIN 0x07 231874bcba6SMarcus Wolf 232874bcba6SMarcus Wolf #define LNA_GAIN_AUTO 0x00 /* default */ 233874bcba6SMarcus Wolf #define LNA_GAIN_MAX 0x01 234874bcba6SMarcus Wolf #define LNA_GAIN_MAX_MINUS_6 0x02 235874bcba6SMarcus Wolf #define LNA_GAIN_MAX_MINUS_12 0x03 236874bcba6SMarcus Wolf #define LNA_GAIN_MAX_MINUS_24 0x04 237874bcba6SMarcus Wolf #define LNA_GAIN_MAX_MINUS_36 0x05 238874bcba6SMarcus Wolf #define LNA_GAIN_MAX_MINUS_48 0x06 239874bcba6SMarcus Wolf 240874bcba6SMarcus Wolf /* RegRxBw (0x19) and RegAfcBw (0x1A) */ 241874bcba6SMarcus Wolf #define MASK_BW_DCC_FREQ 0xE0 242874bcba6SMarcus Wolf #define MASK_BW_MANTISSE 0x18 243874bcba6SMarcus Wolf #define MASK_BW_EXPONENT 0x07 244874bcba6SMarcus Wolf 245874bcba6SMarcus Wolf #define BW_DCC_16_PERCENT 0x00 246874bcba6SMarcus Wolf #define BW_DCC_8_PERCENT 0x20 247874bcba6SMarcus Wolf #define BW_DCC_4_PERCENT 0x40 /* default */ 248874bcba6SMarcus Wolf #define BW_DCC_2_PERCENT 0x60 249874bcba6SMarcus Wolf #define BW_DCC_1_PERCENT 0x80 250874bcba6SMarcus Wolf #define BW_DCC_0_5_PERCENT 0xA0 251874bcba6SMarcus Wolf #define BW_DCC_0_25_PERCENT 0xC0 252874bcba6SMarcus Wolf #define BW_DCC_0_125_PERCENT 0xE0 253874bcba6SMarcus Wolf 254874bcba6SMarcus Wolf #define BW_MANT_16 0x00 255874bcba6SMarcus Wolf #define BW_MANT_20 0x08 256874bcba6SMarcus Wolf #define BW_MANT_24 0x10 /* default */ 257874bcba6SMarcus Wolf 258874bcba6SMarcus Wolf /* RegOokPeak (0x1B) */ 259874bcba6SMarcus Wolf #define MASK_OOKPEAK_THRESTYPE 0xc0 260874bcba6SMarcus Wolf #define MASK_OOKPEAK_THRESSTEP 0x38 261874bcba6SMarcus Wolf #define MASK_OOKPEAK_THRESDEC 0x07 262874bcba6SMarcus Wolf 263874bcba6SMarcus Wolf #define OOKPEAK_THRESHTYPE_FIXED 0x00 264874bcba6SMarcus Wolf #define OOKPEAK_THRESHTYPE_PEAK 0x40 /* default */ 265874bcba6SMarcus Wolf #define OOKPEAK_THRESHTYPE_AVERAGE 0x80 266874bcba6SMarcus Wolf 267874bcba6SMarcus Wolf #define OOKPEAK_THRESHSTEP_0_5_DB 0x00 /* default */ 268874bcba6SMarcus Wolf #define OOKPEAK_THRESHSTEP_1_0_DB 0x08 269874bcba6SMarcus Wolf #define OOKPEAK_THRESHSTEP_1_5_DB 0x10 270874bcba6SMarcus Wolf #define OOKPEAK_THRESHSTEP_2_0_DB 0x18 271874bcba6SMarcus Wolf #define OOKPEAK_THRESHSTEP_3_0_DB 0x20 272874bcba6SMarcus Wolf #define OOKPEAK_THRESHSTEP_4_0_DB 0x28 273874bcba6SMarcus Wolf #define OOKPEAK_THRESHSTEP_5_0_DB 0x30 274874bcba6SMarcus Wolf #define OOKPEAK_THRESHSTEP_6_0_DB 0x38 275874bcba6SMarcus Wolf 276874bcba6SMarcus Wolf #define OOKPEAK_THRESHDEC_ONCE 0x00 /* default */ 277874bcba6SMarcus Wolf #define OOKPEAK_THRESHDEC_EVERY_2ND 0x01 278874bcba6SMarcus Wolf #define OOKPEAK_THRESHDEC_EVERY_4TH 0x02 279874bcba6SMarcus Wolf #define OOKPEAK_THRESHDEC_EVERY_8TH 0x03 280874bcba6SMarcus Wolf #define OOKPEAK_THRESHDEC_TWICE 0x04 281874bcba6SMarcus Wolf #define OOKPEAK_THRESHDEC_4_TIMES 0x05 282874bcba6SMarcus Wolf #define OOKPEAK_THRESHDEC_8_TIMES 0x06 283874bcba6SMarcus Wolf #define OOKPEAK_THRESHDEC_16_TIMES 0x07 284874bcba6SMarcus Wolf 285874bcba6SMarcus Wolf /* 286056eeda2SDerek Robson * // RegOokAvg 287056eeda2SDerek Robson * #define OOKAVG_AVERAGETHRESHFILT_00 0x00 288056eeda2SDerek Robson * #define OOKAVG_AVERAGETHRESHFILT_01 0x40 289056eeda2SDerek Robson * #define OOKAVG_AVERAGETHRESHFILT_10 0x80 // Default 290056eeda2SDerek Robson * #define OOKAVG_AVERAGETHRESHFILT_11 0xC0 291056eeda2SDerek Robson * 292056eeda2SDerek Robson * 293056eeda2SDerek Robson * // RegAfcFei 294056eeda2SDerek Robson * #define AFCFEI_FEI_DONE 0x40 295056eeda2SDerek Robson * #define AFCFEI_FEI_START 0x20 296056eeda2SDerek Robson * #define AFCFEI_AFC_DONE 0x10 297056eeda2SDerek Robson * #define AFCFEI_AFCAUTOCLEAR_ON 0x08 298056eeda2SDerek Robson * #define AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default 299056eeda2SDerek Robson * 300056eeda2SDerek Robson * #define AFCFEI_AFCAUTO_ON 0x04 301056eeda2SDerek Robson * #define AFCFEI_AFCAUTO_OFF 0x00 // Default 302056eeda2SDerek Robson * 303056eeda2SDerek Robson * #define AFCFEI_AFC_CLEAR 0x02 304056eeda2SDerek Robson * #define AFCFEI_AFC_START 0x01 305056eeda2SDerek Robson * 306056eeda2SDerek Robson * // RegRssiConfig 307056eeda2SDerek Robson * #define RSSI_FASTRX_ON 0x08 308056eeda2SDerek Robson * #define RSSI_FASTRX_OFF 0x00 // Default 309056eeda2SDerek Robson * #define RSSI_DONE 0x02 310056eeda2SDerek Robson * #define RSSI_START 0x01 311874bcba6SMarcus Wolf */ 312874bcba6SMarcus Wolf 313874bcba6SMarcus Wolf /* RegDioMapping1 */ 314874bcba6SMarcus Wolf #define MASK_DIO0 0xC0 315874bcba6SMarcus Wolf #define MASK_DIO1 0x30 316874bcba6SMarcus Wolf #define MASK_DIO2 0x0C 317874bcba6SMarcus Wolf #define MASK_DIO3 0x03 318874bcba6SMarcus Wolf #define SHIFT_DIO0 6 319874bcba6SMarcus Wolf #define SHIFT_DIO1 4 320874bcba6SMarcus Wolf #define SHIFT_DIO2 2 321874bcba6SMarcus Wolf #define SHIFT_DIO3 0 322874bcba6SMarcus Wolf 323874bcba6SMarcus Wolf /* RegDioMapping2 */ 324874bcba6SMarcus Wolf #define MASK_DIO4 0xC0 325874bcba6SMarcus Wolf #define MASK_DIO5 0x30 326874bcba6SMarcus Wolf #define SHIFT_DIO4 6 327874bcba6SMarcus Wolf #define SHIFT_DIO5 4 328874bcba6SMarcus Wolf 329874bcba6SMarcus Wolf /* DIO numbers */ 330874bcba6SMarcus Wolf #define DIO0 0 331874bcba6SMarcus Wolf #define DIO1 1 332874bcba6SMarcus Wolf #define DIO2 2 333874bcba6SMarcus Wolf #define DIO3 3 334874bcba6SMarcus Wolf #define DIO4 4 335874bcba6SMarcus Wolf #define DIO5 5 336874bcba6SMarcus Wolf 337874bcba6SMarcus Wolf /* DIO Mapping values (packet mode) */ 3383d7f3bf2SSimon Sandström #define DIO_MODE_READY_DIO4 0x00 3393d7f3bf2SSimon Sandström #define DIO_MODE_READY_DIO5 0x03 3403d7f3bf2SSimon Sandström #define DIO_CLK_OUT 0x00 3413d7f3bf2SSimon Sandström #define DIO_DATA 0x01 3423d7f3bf2SSimon Sandström #define DIO_TIMEOUT_DIO1 0x03 3433d7f3bf2SSimon Sandström #define DIO_TIMEOUT_DIO4 0x00 3443d7f3bf2SSimon Sandström #define DIO_RSSI_DIO0 0x03 3453d7f3bf2SSimon Sandström #define DIO_RSSI_DIO3_4 0x01 3463d7f3bf2SSimon Sandström #define DIO_RX_READY 0x02 3473d7f3bf2SSimon Sandström #define DIO_PLL_LOCK 0x03 3483d7f3bf2SSimon Sandström #define DIO_TX_READY 0x01 3493d7f3bf2SSimon Sandström #define DIO_FIFO_FULL_DIO1 0x01 3503d7f3bf2SSimon Sandström #define DIO_FIFO_FULL_DIO3 0x00 3513d7f3bf2SSimon Sandström #define DIO_SYNC_ADDRESS 0x02 3523d7f3bf2SSimon Sandström #define DIO_FIFO_NOT_EMPTY_DIO1 0x02 3533d7f3bf2SSimon Sandström #define DIO_FIFO_NOT_EMPTY_FIO2 0x00 3543d7f3bf2SSimon Sandström #define DIO_AUTOMODE 0x04 3553d7f3bf2SSimon Sandström #define DIO_FIFO_LEVEL 0x00 3563d7f3bf2SSimon Sandström #define DIO_CRC_OK 0x00 3573d7f3bf2SSimon Sandström #define DIO_PAYLOAD_READY 0x01 3583d7f3bf2SSimon Sandström #define DIO_PACKET_SENT 0x00 3593d7f3bf2SSimon Sandström #define DIO_DCLK 0x00 360874bcba6SMarcus Wolf 361874bcba6SMarcus Wolf /* RegDioMapping2 CLK_OUT part */ 362874bcba6SMarcus Wolf #define MASK_DIOMAPPING2_CLK_OUT 0x07 363874bcba6SMarcus Wolf 364874bcba6SMarcus Wolf #define DIOMAPPING2_CLK_OUT_NO_DIV 0x00 365874bcba6SMarcus Wolf #define DIOMAPPING2_CLK_OUT_DIV_2 0x01 366874bcba6SMarcus Wolf #define DIOMAPPING2_CLK_OUT_DIV_4 0x02 367874bcba6SMarcus Wolf #define DIOMAPPING2_CLK_OUT_DIV_8 0x03 368874bcba6SMarcus Wolf #define DIOMAPPING2_CLK_OUT_DIV_16 0x04 369874bcba6SMarcus Wolf #define DIOMAPPING2_CLK_OUT_DIV_32 0x05 370874bcba6SMarcus Wolf #define DIOMAPPING2_CLK_OUT_RC 0x06 371874bcba6SMarcus Wolf #define DIOMAPPING2_CLK_OUT_OFF 0x07 /* default */ 372874bcba6SMarcus Wolf 373874bcba6SMarcus Wolf /* RegIrqFlags1 */ 374874bcba6SMarcus Wolf #define MASK_IRQFLAGS1_MODE_READY 0x80 375874bcba6SMarcus Wolf #define MASK_IRQFLAGS1_RX_READY 0x40 376874bcba6SMarcus Wolf #define MASK_IRQFLAGS1_TX_READY 0x20 377874bcba6SMarcus Wolf #define MASK_IRQFLAGS1_PLL_LOCK 0x10 378874bcba6SMarcus Wolf #define MASK_IRQFLAGS1_RSSI 0x08 379874bcba6SMarcus Wolf #define MASK_IRQFLAGS1_TIMEOUT 0x04 380874bcba6SMarcus Wolf #define MASK_IRQFLAGS1_AUTOMODE 0x02 381874bcba6SMarcus Wolf #define MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH 0x01 382874bcba6SMarcus Wolf 383874bcba6SMarcus Wolf /* RegIrqFlags2 */ 384874bcba6SMarcus Wolf #define MASK_IRQFLAGS2_FIFO_FULL 0x80 385874bcba6SMarcus Wolf #define MASK_IRQFLAGS2_FIFO_NOT_EMPTY 0x40 386874bcba6SMarcus Wolf #define MASK_IRQFLAGS2_FIFO_LEVEL 0x20 387874bcba6SMarcus Wolf #define MASK_IRQFLAGS2_FIFO_OVERRUN 0x10 388874bcba6SMarcus Wolf #define MASK_IRQFLAGS2_PACKET_SENT 0x08 389874bcba6SMarcus Wolf #define MASK_IRQFLAGS2_PAYLOAD_READY 0x04 390874bcba6SMarcus Wolf #define MASK_IRQFLAGS2_CRC_OK 0x02 391874bcba6SMarcus Wolf #define MASK_IRQFLAGS2_LOW_BAT 0x01 392874bcba6SMarcus Wolf 393874bcba6SMarcus Wolf /* RegSyncConfig */ 394874bcba6SMarcus Wolf #define MASK_SYNC_CONFIG_SYNC_ON 0x80 /* default */ 395874bcba6SMarcus Wolf #define MASK_SYNC_CONFIG_FIFO_FILL_CONDITION 0x40 396874bcba6SMarcus Wolf #define MASK_SYNC_CONFIG_SYNC_SIZE 0x38 397874bcba6SMarcus Wolf #define MASK_SYNC_CONFIG_SYNC_TOLERANCE 0x07 398874bcba6SMarcus Wolf 399874bcba6SMarcus Wolf /* RegPacketConfig1 */ 400d0222e9aSYannick Loeck #define MASK_PACKETCONFIG1_PACKET_FORMAT_VARIABLE 0x80 401874bcba6SMarcus Wolf #define MASK_PACKETCONFIG1_DCFREE 0x60 402874bcba6SMarcus Wolf #define MASK_PACKETCONFIG1_CRC_ON 0x10 /* default */ 403874bcba6SMarcus Wolf #define MASK_PACKETCONFIG1_CRCAUTOCLEAR_OFF 0x08 404874bcba6SMarcus Wolf #define MASK_PACKETCONFIG1_ADDRESSFILTERING 0x06 405874bcba6SMarcus Wolf 406874bcba6SMarcus Wolf #define PACKETCONFIG1_DCFREE_OFF 0x00 /* default */ 407874bcba6SMarcus Wolf #define PACKETCONFIG1_DCFREE_MANCHESTER 0x20 408874bcba6SMarcus Wolf #define PACKETCONFIG1_DCFREE_WHITENING 0x40 409874bcba6SMarcus Wolf #define PACKETCONFIG1_ADDRESSFILTERING_OFF 0x00 /* default */ 410874bcba6SMarcus Wolf #define PACKETCONFIG1_ADDRESSFILTERING_NODE 0x02 411874bcba6SMarcus Wolf #define PACKETCONFIG1_ADDRESSFILTERING_NODEBROADCAST 0x04 412874bcba6SMarcus Wolf 413874bcba6SMarcus Wolf /* 414056eeda2SDerek Robson * // RegAutoModes 415056eeda2SDerek Robson * #define AUTOMODES_ENTER_OFF 0x00 // Default 416056eeda2SDerek Robson * #define AUTOMODES_ENTER_FIFONOTEMPTY 0x20 417056eeda2SDerek Robson * #define AUTOMODES_ENTER_FIFOLEVEL 0x40 418056eeda2SDerek Robson * #define AUTOMODES_ENTER_CRCOK 0x60 419056eeda2SDerek Robson * #define AUTOMODES_ENTER_PAYLOADREADY 0x80 420056eeda2SDerek Robson * #define AUTOMODES_ENTER_SYNCADRSMATCH 0xA0 421056eeda2SDerek Robson * #define AUTOMODES_ENTER_PACKETSENT 0xC0 422056eeda2SDerek Robson * #define AUTOMODES_ENTER_FIFOEMPTY 0xE0 423056eeda2SDerek Robson * 424056eeda2SDerek Robson * #define AUTOMODES_EXIT_OFF 0x00 // Default 425056eeda2SDerek Robson * #define AUTOMODES_EXIT_FIFOEMPTY 0x04 426056eeda2SDerek Robson * #define AUTOMODES_EXIT_FIFOLEVEL 0x08 427056eeda2SDerek Robson * #define AUTOMODES_EXIT_CRCOK 0x0C 428056eeda2SDerek Robson * #define AUTOMODES_EXIT_PAYLOADREADY 0x10 429056eeda2SDerek Robson * #define AUTOMODES_EXIT_SYNCADRSMATCH 0x14 430056eeda2SDerek Robson * #define AUTOMODES_EXIT_PACKETSENT 0x18 431056eeda2SDerek Robson * #define AUTOMODES_EXIT_RXTIMEOUT 0x1C 432056eeda2SDerek Robson * 433056eeda2SDerek Robson * #define AUTOMODES_INTERMEDIATE_SLEEP 0x00 // Default 434056eeda2SDerek Robson * #define AUTOMODES_INTERMEDIATE_STANDBY 0x01 435056eeda2SDerek Robson * #define AUTOMODES_INTERMEDIATE_RECEIVER 0x02 436056eeda2SDerek Robson * #define AUTOMODES_INTERMEDIATE_TRANSMITTER 0x03 437056eeda2SDerek Robson * 438874bcba6SMarcus Wolf */ 439874bcba6SMarcus Wolf /* RegFifoThresh (0x3c) */ 440874bcba6SMarcus Wolf #define MASK_FIFO_THRESH_TXSTART 0x80 441874bcba6SMarcus Wolf #define MASK_FIFO_THRESH_VALUE 0x7F 442874bcba6SMarcus Wolf 443874bcba6SMarcus Wolf /* 444056eeda2SDerek Robson * 445056eeda2SDerek Robson * // RegPacketConfig2 446056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_1BIT 0x00 // Default 447056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_2BITS 0x10 448056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_4BITS 0x20 449056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_8BITS 0x30 450056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_16BITS 0x40 451056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_32BITS 0x50 452056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_64BITS 0x60 453056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_128BITS 0x70 454056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_256BITS 0x80 455056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_512BITS 0x90 456056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_1024BITS 0xA0 457056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_2048BITS 0xB0 458056eeda2SDerek Robson * #define PACKET2_RXRESTARTDELAY_NONE 0xC0 459056eeda2SDerek Robson * #define PACKET2_RXRESTART 0x04 460056eeda2SDerek Robson * 461056eeda2SDerek Robson * #define PACKET2_AUTORXRESTART_ON 0x02 // Default 462056eeda2SDerek Robson * #define PACKET2_AUTORXRESTART_OFF 0x00 463056eeda2SDerek Robson * 464056eeda2SDerek Robson * #define PACKET2_AES_ON 0x01 465056eeda2SDerek Robson * #define PACKET2_AES_OFF 0x00 // Default 466056eeda2SDerek Robson * 467056eeda2SDerek Robson * 468056eeda2SDerek Robson * // RegTemp1 469056eeda2SDerek Robson * #define TEMP1_MEAS_START 0x08 470056eeda2SDerek Robson * #define TEMP1_MEAS_RUNNING 0x04 471056eeda2SDerek Robson * #define TEMP1_ADCLOWPOWER_ON 0x01 // Default 472056eeda2SDerek Robson * #define TEMP1_ADCLOWPOWER_OFF 0x00 473874bcba6SMarcus Wolf */ 474874bcba6SMarcus Wolf 475874bcba6SMarcus Wolf // RegTestDagc (0x6F) 476874bcba6SMarcus Wolf #define DAGC_NORMAL 0x00 /* Reset value */ 477874bcba6SMarcus Wolf #define DAGC_IMPROVED_LOWBETA1 0x20 478874bcba6SMarcus Wolf #define DAGC_IMPROVED_LOWBETA0 0x30 /* Recommended val */ 479