| /openbmc/openbmc/poky/documentation/kernel-dev/ |
| H A D | advanced.rst | 1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
4 Working with Advanced Metadata (``yocto-kernel-cache``)
19 :ref:`overview-manual/development-environment:yocto project source repositories`
20 is the ``yocto-kernel-cache`` Git repository. You can find this repository
24 Kernel development tools ("kern-tools") are also available in the Yocto Project
26 ``yocto-kernel-tools`` Git repository. The recipe that builds these
27 tools is ``meta/recipes-kernel/kern-tools/kern-tools-native_git.bb`` in
35 Metadata, which is located in the ``yocto-kernel-cache`` Git repository.
37 definitions in linux-yocto recipes for corresponding BSPs. A BSP
39 hardware-specific features. The BSP can be influenced from within the
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/sblim-sfcb/sblim-sfcb/ |
| H A D | sblim-sfcb-1.3.16-multilib-man-cfg.patch | 1 Upstream-Status: Pending
3 diff -up sblim-sfcb-1.3.16/man/sfcbd.1.pre.in.orig sblim-sfcb-1.3.16/man/sfcbd.1.pre.in
4 --- sblim-sfcb-1.3.16/man/sfcbd.1.pre.in.orig 2014-02-26 14:05:32.213091734 +0100
5 +++ sblim-sfcb-1.3.16/man/sfcbd.1.pre.in 2014-02-26 15:10:54.476196379 +0100
6 @@ -151,7 +151,7 @@ Default=\fI@localstatedir@/lib/sfcb/regi
9 A space separated list of directories where sfcb is looking for provider
10 -libraries. Default=\fI@libdir@\ @libdir@/cmpi\fR
15 @@ -275,11 +275,11 @@ SSL private key file for sfcb.
19 -.I @libdir@/libsfc*
23 -.I @libdir@/cmpi/*
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| /openbmc/openbmc/ |
| H A D | setup | 10 # http://www.apache.org/licenses/LICENSE-2.0
21 if [ -z "$COLUMN_CMD" ]; then
26 if [ -n "$EXPAND_CMD" ]; then
27 COLUMN=( "sh" "-c" "$COLUMN_CMD | $EXPAND_CMD" )
36 local cfg name tmpl
40 if [ -n "$ZSH_NAME" ]; then
44 configs="$(find meta-* -path "*/conf/machine/*.conf")"
46 configs=$(ls -1 meta-*/meta-*/conf/machine/*.conf meta-*/conf/machine/*.conf)
49 configs="$configs $(ls -1 poky/meta/conf/machine/qemu*.conf)"
51 for cfg in $configs; do
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| /openbmc/u-boot/board/freescale/t104xrdb/ |
| H A D | README | 2 --------
9 personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch).
16 The board is re-designed T1040RDB board with following changes :
17 - Support of DDR4 memory and some enhancements
20 The board is re-designed T1040RDB board with following changes :
21 - Support of DDR4 memory
22 - Support for 0x86 serdes protocol which can support following interfaces
23 - 2 RGMII's on DTSEC4, DTSEC5
24 - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3
27 -------------------------------------------------------------------------
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| /openbmc/u-boot/drivers/pci/ |
| H A D | pcie_dw_mvebu.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 * - drivers/pci/pcie_imx.c
9 * - drivers/pci/pci_mvebu.c
10 * - drivers/pci/pcie_xilinx.c
17 #include <asm-generic/gpio.h>
21 /* PCI Config space registers */
97 * struct pcie_dw_mvebu - MVEBU DW PCIe controller state
99 * @ctrl_base: The base address of the register space
100 * @cfg_base: The base address of the configuration space
101 * @cfg_size: The size of the configuration space which is needed
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| H A D | pci.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
14 * and change pci-uclass.c.
32 return hose->rw##_##size(hose, dev, offset, value); \
50 return -1; \
71 *val = -1; \
72 return -1; \
88 return -1; \
96 return -1; \
114 if (gd->hose) in pci_get_hose_head()
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| H A D | pcie_imx.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Freescale i.MX6 PCI Express Root-Complex driver
8 * pci-imx6.c: Sean Cross <xobs@kosagi.com>
9 * pcie-designware.c: Jingoo Han <jg1.han@samsung.com>
42 /* PCIe Port Logic registers (memory-mapped) */
63 /* PHY registers (not memory-mapped) */
115 return -ETIMEDOUT; in pcie_phy_poll_ack()
143 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
200 /* wait for ack de-assertion */ in pcie_phy_write()
218 /* wait for ack de-assertion */ in pcie_phy_write()
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| /openbmc/u-boot/include/configs/ |
| H A D | corenet_ds.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2009-2012 Freescale Semiconductor, Inc.
25 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg
27 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p3041ds.cfg
29 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p4080ds.cfg
31 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5020ds.cfg
33 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg
39 /* Set 1M boot space */
58 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
80 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
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| H A D | T208xQDS.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
36 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg
55 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
57 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_nand_rcw.cfg
59 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_nand_rcw.cfg
71 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
76 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_spi_rcw.cfg
78 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_spi_rcw.cfg
89 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
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| H A D | T102xRDB.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
33 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg
51 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
53 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg
55 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg
67 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
72 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_spi_rcw.cfg
74 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg
85 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
90 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_sd_rcw.cfg
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| H A D | lacie_kw.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
53 * from the Network Space v2
56 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-is2.cfg
58 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg
62 * mv-common.h should be defined after CMD configs since it used them
65 #include "mv-common.h"
67 /* Remove or override few declarations from mv-common.h */
108 /* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */
110 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */
111 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit device address */
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| H A D | T104xRDB.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
17 #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg
20 $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi_sb.cfg
40 * with U-Boot image.
50 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
53 $(SRCTREE)/board/freescale/t104xrdb/t1040_nand_rcw.cfg
57 $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_nand_rcw.cfg
61 $(SRCTREE)/board/freescale/t104xrdb/t1042_nand_rcw.cfg
65 $(SRCTREE)/board/freescale/t104xrdb/t1040d4_nand_rcw.cfg
69 $(SRCTREE)/board/freescale/t104xrdb/t1042d4_nand_rcw.cfg
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| H A D | T208xRDB.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
30 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg
49 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
50 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_nand_rcw.cfg
61 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
65 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_spi_rcw.cfg
75 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
79 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_sd_rcw.cfg
87 /* Set 1M boot space */
129 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
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| H A D | T102xQDS.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
30 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg
48 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
49 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_nand_rcw.cfg
60 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
64 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_spi_rcw.cfg
74 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
78 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xqds/t1024_sd_rcw.cfg
88 /* PCIe Boot - Master */
91 * for slave u-boot IMAGE instored in master memory space,
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| H A D | T4240QDS.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011-2012 Freescale Semiconductor, Inc.
18 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t4qds/t4_pbi.cfg
35 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
36 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t4qds/t4_nand_rcw.cfg
49 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
50 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t4qds/t4_sd_rcw.cfg
64 /* Set 1M boot space */
93 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
217 | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
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| H A D | at91sam9260ek.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2007-2008
15 * In this case SoC is defined in boards.cfg.
54 * Initialized before u-boot gets started.
60 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
61 * leaving the correct space for initial global data structure above
66 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
69 (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
74 * (see boards.cfg for different boards)
117 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
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| /openbmc/qemu/hw/9pfs/ |
| H A D | virtio-9p-device.c | 10 * the COPYING file in the top-level directory.
22 #include "virtio-9p.h"
23 #include "fsdev/qemu-fsdev.h"
25 #include "hw/qdev-properties.h"
26 #include "hw/virtio/virtio-access.h"
33 V9fsState *s = pdu->s; in virtio_9p_push_and_notify()
35 VirtQueueElement *elem = v->elems[pdu->idx]; in virtio_9p_push_and_notify()
38 virtqueue_push(v->vq, elem, pdu->size); in virtio_9p_push_and_notify()
40 v->elems[pdu->idx] = NULL; in virtio_9p_push_and_notify()
43 virtio_notify(VIRTIO_DEVICE(v), v->vq); in virtio_9p_push_and_notify()
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| /openbmc/qemu/hw/vmapple/ |
| H A D | vmapple.c | 7 * See the COPYING file in the top-level directory.
9 * SPDX-License-Identifier: GPL-2.0-or-later
11 * VMApple is the device model that the macOS built-in hypervisor called
20 #include "qemu/error-report.h"
21 #include "qemu/guest-random.h"
22 #include "qemu/help-texts.h"
31 #include "hw/qdev-properties.h"
40 #include "hw/pci-host/gpex.h"
41 #include "hw/usb/hcd-xhci-pci.h"
42 #include "hw/virtio/virtio-pci.h"
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| /openbmc/qemu/hw/input/ |
| H A D | virtio-input.c | 4 * top-level directory.
14 #include "hw/qdev-properties.h"
15 #include "hw/virtio/virtio-input.h"
17 #include "standard-headers/linux/input.h"
21 /* ----------------------------------------------------------------- */
28 if (!vinput->active) { in virtio_input_send()
33 if (vinput->qindex == vinput->qsize) { in virtio_input_send()
34 vinput->qsize++; in virtio_input_send()
35 vinput->queue = g_realloc(vinput->queue, vinput->qsize * in virtio_input_send()
36 sizeof(vinput->queue[0])); in virtio_input_send()
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| /openbmc/u-boot/drivers/ddr/altera/ |
| H A D | sdram_gen5.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright Altera Corporation (C) 2014-2015
17 u32 rule; /* SDRAM protection rule number: 0-19 */
18 int valid; /* Rule valid or not? 1 - valid, 0 not*/
33 * get_errata_rows() - Up the number of DRAM rows to cover entire address space
34 * @cfg: SDRAM controller configuration data
36 * SDRAM Failure happens when accessing non-existent memory. Artificially
40 static int get_errata_rows(const struct socfpga_sdram_config *cfg) in get_errata_rows() argument
42 /* Define constant for 4G memory - used for SDRAM errata workaround */ in get_errata_rows()
46 ((cfg->dram_addrw & SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK) >> in get_errata_rows()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | aspeed_pcie.c | 9 * SPDX-License-Identifier: GPL-2.0-or-later
22 #include "hw/qdev-properties.h"
26 #include "hw/pci-host/aspeed_pcie.h"
39 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); in aspeed_pcie_root_class_init()
40 dc->desc = "ASPEED PCIe Host Bridge"; in aspeed_pcie_root_class_init()
41 k->vendor_id = PCI_VENDOR_ID_ASPEED; in aspeed_pcie_root_class_init()
42 k->device_id = 0x1150; in aspeed_pcie_root_class_init()
43 k->class_id = PCI_CLASS_BRIDGE_HOST; in aspeed_pcie_root_class_init()
44 k->revision = 0; in aspeed_pcie_root_class_init()
47 * PCI-facing part of the host bridge, in aspeed_pcie_root_class_init()
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| H A D | designware.c | 29 #include "hw/qdev-properties.h"
32 #include "hw/pci-host/designware.h"
67 k->max_dev = 1; in designware_pcie_root_bus_class_init()
74 return DESIGNWARE_PCIE_HOST(bus->parent); in designware_pcie_root_to_host()
85 * AHB/AXI bus like any other PCI-device-initiated DMA read. in designware_pcie_root_msi_read()
87 * well-behaved guests won't ever ask a PCI device to DMA from in designware_pcie_root_msi_read()
100 root->msi.intr[0].status |= BIT(val) & root->msi.intr[0].enable; in designware_pcie_root_msi_write()
102 if (root->msi.intr[0].status & ~root->msi.intr[0].mask) { in designware_pcie_root_msi_write()
103 qemu_set_irq(host->pci.msi, 1); in designware_pcie_root_msi_write()
120 MemoryRegion *mem = &root->msi.iomem; in designware_pcie_root_update_msi_mapping()
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| /openbmc/u-boot/drivers/pinctrl/renesas/ |
| H A D | sh_pfc.h | 105 * - name: Register name (unused, for documentation purposes only)
106 * - r: Physical register address
107 * - r_width: Width of the register (in bits)
108 * - f_width: Width of the fixed-width register fields (in bits)
119 * - name: Register name (unused, for documentation purposes only)
120 * - r: Physical register address
121 * - r_width: Width of the register (in bits)
122 * - var_fw0, var_fwn...: List of widths of the register fields (in bits),
150 u32 puen; /* Pull-enable or pull-up control register */
151 u32 pud; /* Pull-up/down control register (optional) */
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| /openbmc/u-boot/drivers/misc/ |
| H A D | qfw.c | 1 // SPDX-License-Identifier: GPL-2.0+
40 align = le32_to_cpu(entry->alloc.align); in bios_linker_allocate()
42 if (align & (align - 1)) { in bios_linker_allocate()
44 return -EINVAL; in bios_linker_allocate()
47 file = qemu_fwcfg_find_file(entry->alloc.file); in bios_linker_allocate()
49 printf("error: can't find file %s\n", entry->alloc.file); in bios_linker_allocate()
50 return -ENOENT; in bios_linker_allocate()
53 size = be32_to_cpu(file->cfg.size); in bios_linker_allocate()
57 * malloc space is already at the end of RAM, so we directly use it. in bios_linker_allocate()
61 if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH) { in bios_linker_allocate()
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| /openbmc/qemu/docs/system/ |
| H A D | igvm.rst | 11 also be used to configure non-confidential guests. Multiple platforms can be
13 virtual machine that can run on, for example, TDX, SEV and non-confidential
16 QEMU supports IGVM files through the user-creatable ``igvm-cfg`` object. This
18 to the object is added to the ``-machine`` to configure the virtual machine
27 ---------------------------
37 -------------------
40 that support AMD SEV, SEV-ES and SEV-SNP with KVM. IGVM files can also be
41 provided for non-confidential guests.
44 Limitations when using IGVM with AMD SEV, SEV-ES and SEV-SNP
45 ------------------------------------------------------------
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