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/openbmc/qemu/docs/system/
H A Dtarget-arm.rst3 Arm System emulator
6 QEMU can emulate both 32-bit and 64-bit Arm CPUs. Use the
7 ``qemu-system-aarch64`` executable to simulate a 64-bit Arm machine.
8 You can use either ``qemu-system-arm`` or ``qemu-system-aarch64``
9 to simulate a 32-bit Arm machine: in general, command lines that
10 work for ``qemu-system-arm`` will behave the same when used with
13 QEMU has generally good support for Arm guests. It has support for
15 Arm hardware is much more widely varying than x86 hardware. Arm CPUs
20 small fraction of the Arm hardware ecosystem.
22 The situation for 64-bit Arm is fairly similar, except that we don't
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/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dcpus.yaml4 $id: http://devicetree.org/schemas/arm/cpus.yaml#
7 title: ARM CPUs
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
37 The ARM architecture, in accordance with the Devicetree Specification,
45 Usage and definition depend on ARM architecture version and
48 On uniprocessor ARM architectures previous to v7
51 On ARM 11 MPcore based systems this property is
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
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H A Darm,vexpress-juno.yaml4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
7 title: ARM Versatile Express and Juno Boards
10 - Sudeep Holla <sudeep.holla@arm.com>
14 ARM's Versatile Express platform were built as reference designs for exploring
30 "arm,vexpress" compatible was retained in the root node, and these are
36 manual, followed by "arm,vexpress" as an additional compatible value. If
46 in MPCore configuration in a test chip on the core tile. See ARM
49 - const: arm,vexpress,v2p-ca9
50 - const: arm,vexpress
53 and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
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H A Dpmu.yaml4 $id: http://devicetree.org/schemas/arm/pmu.yaml#
7 title: ARM Performance Monitor Units
10 - Mark Rutland <mark.rutland@arm.com>
11 - Will Deacon <will.deacon@arm.com>
14 ARM cores often have a PMU for counting cpu and cache events like cache misses
15 and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
27 - arm,armv8-pmuv3 # Only for s/w models
28 - arm,arm1136-pmu
29 - arm,arm1176-pmu
30 - arm,arm11mpcore-pmu
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H A Darm,coresight-cti.yaml5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
31 are implementation defined, except when the CTI is connected to an ARM v8
34 In this case the ARM v8 architecture defines the required signal connections
37 indicate this feature (arm,coresight-cti-v8-arch).
52 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
66 - $ref: /schemas/arm/primecell.yaml#
68 # Need a custom select here or 'arm,primecell' will match on lots of nodes
74 - arm,coresight-cti
84 - const: arm,coresight-cti
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H A Dvexpress-config.yaml4 $id: http://devicetree.org/schemas/arm/vexpress-config.yaml#
7 title: ARM Versatile Express configuration bus
10 - Andre Przywara <andre.przywara@arm.com>
20 const: arm,vexpress,config-bus
22 arm,vexpress,config-bridge:
31 const: arm,vexpress-muxfpga
33 arm,vexpress-sysreg,func:
43 - arm,vexpress-sysreg,func
49 const: arm,vexpress-shutdown
51 arm,vexpress-sysreg,func:
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H A Darm,realview.yaml4 $id: http://devicetree.org/schemas/arm/arm,realview.yaml#
7 title: ARM RealView Boards
13 The ARM RealView series of reference designs were built to explore the ARM
22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created
24 pluggable CPU modules, see ARM DUI 0303E.
26 - const: arm,realview-eb
27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S
28 (HBI-0147) was created as a development board to test ARM TrustZone,
29 CoreSight and Intelligent Energy Management (IEM) see ARM DUI 0425F.
31 - const: arm,realview-pb1176
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/openbmc/openbmc/meta-arm/meta-arm-systemready/
H A DREADME.md1 # meta-arm-systemready Yocto Layer
4 [Arm SystemReady][] validation on the supported machines.
7 top-level meta-arm [README.md](../README.md) file.
13 * Building the firmware for the [Arm SystemReady][] certification program
14 * Running [Arm SystemReady ACS][] (Architecture Compliance Suite) tests
18 [`meta-arm-bsp`][] layer in the top-level meta-arm defines the
20 layer to build the firmware, run the [Arm SystemReady IR][] ACS tests, and
26 The `arm-systemready-firmware.bb` recipe is to build the firmware. It requires
39 There are two additional recipes for generating the Arm SystemReady ACS tests
41 [Arm SystemReady scripts][]. These packages are installed in the
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/openbmc/u-boot/doc/
H A DREADME.scrapyard20 da830evm arm arm926ejs d7e8b2b9 2015-09-12 Nick Thompson <nick.thompson@ge…
21 wireless_space arm arm926ejs b352182a 2015-09-12 Albert ARIBAUD <albert.u.boot@a…
31 balloon3 arm pxa 679d4456 2015-08-30 Marek Vasut <marex@denx.de>
32 cpu9260_128M arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com>
33 cpu9260 arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com>
34 cpu9260_nand_128M arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com>
35 cpu9260_nand arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com>
36 cpu9G20_128M arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com>
37 cpu9G20 arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com>
38 cpuat91 arm arm920t af7f884b 2015-08-30 Eric Benard <eric@eukrea.com>
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/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi11 compatible = "arm,armv7-timer-mem";
26 compatible = "arm,mhu", "arm,primecell";
37 compatible = "arm,mmu-400", "arm,smmu-v1";
49 compatible = "arm,mmu-401", "arm,smmu-v1";
60 compatible = "arm,mmu-401", "arm,smmu-v1";
71 compatible = "arm,gic-400", "arm,cortex-a15-gic";
84 compatible = "arm,gic-v2m-frame";
90 compatible = "arm,gic-v2m-frame";
96 compatible = "arm,gic-v2m-frame";
102 compatible = "arm,gic-v2m-frame";
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H A Drtsm_ve-motherboard.dtsi3 * ARM Ltd. Fast Models
41 compatible = "arm,vexpress,config-bus";
42 arm,vexpress,config-bridge = <&v2m_sysreg>;
46 compatible = "arm,vexpress-osc";
47 arm,vexpress-sysreg,func = <1 1>;
54 compatible = "arm,vexpress-reset";
55 arm,vexpress-sysreg,func = <5 0>;
59 compatible = "arm,vexpress-muxfpga";
60 arm,vexpress-sysreg,func = <7 0>;
64 compatible = "arm,vexpress-shutdown";
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/openbmc/linux/arch/arm64/boot/dts/lg/
H A Dlg1312.dtsi9 #include <dt-bindings/interrupt-controller/arm-gic.h>
24 compatible = "arm,cortex-a53";
30 compatible = "arm,cortex-a53";
37 compatible = "arm,cortex-a53";
44 compatible = "arm,cortex-a53";
57 compatible = "arm,psci-0.2", "arm,psci";
66 compatible = "arm,gic-400";
75 compatible = "arm,cortex-a53-pmu";
87 compatible = "arm,armv8-timer";
135 compatible = "arm,sp804", "arm,primecell";
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H A Dlg1313.dtsi9 #include <dt-bindings/interrupt-controller/arm-gic.h>
24 compatible = "arm,cortex-a53";
30 compatible = "arm,cortex-a53";
37 compatible = "arm,cortex-a53";
44 compatible = "arm,cortex-a53";
57 compatible = "arm,psci-0.2", "arm,psci";
66 compatible = "arm,gic-400";
75 compatible = "arm,cortex-a53-pmu";
87 compatible = "arm,armv8-timer";
135 compatible = "arm,sp804", "arm,primecell";
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/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca9.dts3 * ARM Ltd. Versatile Express
16 arm,hbi = <0x191>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca9", "arm,vexpress";
40 compatible = "arm,cortex-a9";
47 compatible = "arm,cortex-a9";
54 compatible = "arm,cortex-a9";
61 compatible = "arm,cortex-a9";
87 compatible = "arm,pl111", "arm,primecell";
99 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
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H A Dvexpress-v2p-ca15_a7.dts3 * ARM Ltd. Versatile Express
16 arm,hbi = <0x249>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
40 compatible = "arm,cortex-a15";
50 compatible = "arm,cortex-a15";
60 compatible = "arm,cortex-a7";
70 compatible = "arm,cortex-a7";
80 compatible = "arm,cortex-a7";
90 compatible = "arm,idle-state";
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H A Dvexpress-v2p-ca15-tc1.dts3 * ARM Ltd. Versatile Express
16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
40 compatible = "arm,cortex-a15";
46 compatible = "arm,cortex-a15";
71 compatible = "arm,hdlcd";
79 compatible = "arm,pl341", "arm,primecell";
86 compatible = "arm,sp805", "arm,primecell";
95 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
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H A Dvexpress-v2m-rs1.dtsi3 * ARM Ltd. Versatile Express
10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
156 arm,hbi = <0x190>;
157 arm,vexpress,site = <0>;
158 compatible = "arm,vexpress,v2m-p1", "simple-bus";
169 compatible = "arm,vexpress-flash", "cfi-flash";
174 compatible = "arm,arm-firmware-suite";
179 compatible = "arm,vexpress-psram", "mtd-ram";
210 compatible = "arm,vexpress-sysreg";
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H A Dvexpress-v2m.dtsi3 * ARM Ltd. Versatile Express
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
77 arm,hbi = <0x190>;
78 arm,vexpress,site = <0>;
79 compatible = "arm,vexpress,v2m-p1", "simple-bus";
89 compatible = "arm,vexpress-flash", "cfi-flash";
94 compatible = "arm,arm-firmware-suite";
99 compatible = "arm,vexpress-psram", "mtd-ram";
130 compatible = "arm,vexpress-sysreg";
137 compatible = "arm,vexpress-sysreg,sys_led";
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H A Dvexpress-v2p-ca5s.dts3 * ARM Ltd. Versatile Express
16 arm,hbi = <0x225>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress";
40 compatible = "arm,cortex-a5";
47 compatible = "arm,cortex-a5";
73 compatible = "arm,hdlcd";
81 compatible = "arm,pl341", "arm,primecell";
88 compatible = "arm,pl354", "arm,primecell";
97 compatible = "arm,cortex-a5-scu";
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/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-coresight.dtsi14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
39 compatible = "arm,coresight-tmc", "arm,primecell";
64 compatible = "arm,coresight-static-replicator";
100 compatible = "arm,coresight-tmc", "arm,primecell";
116 compatible = "arm,coresight-tpiu", "arm,primecell";
132 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
217 compatible = "arm,coresight-etm4x", "arm,primecell";
236 compatible = "arm,coresight-etm4x", "arm,primecell";
255 compatible = "arm,coresight-etm4x", "arm,primecell";
274 compatible = "arm,coresight-etm4x", "arm,primecell";
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/openbmc/u-boot/arch/arm/dts/
H A Dthunderx-88xx.dtsi16 compatible = "arm,psci-0.2";
26 compatible = "cavium,thunder", "arm,armv8";
32 compatible = "cavium,thunder", "arm,armv8";
38 compatible = "cavium,thunder", "arm,armv8";
44 compatible = "cavium,thunder", "arm,armv8";
50 compatible = "cavium,thunder", "arm,armv8";
56 compatible = "cavium,thunder", "arm,armv8";
62 compatible = "cavium,thunder", "arm,armv8";
68 compatible = "cavium,thunder", "arm,armv8";
74 compatible = "cavium,thunder", "arm,armv8";
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/openbmc/linux/arch/arm/crypto/
H A DMakefile6 obj-$(CONFIG_CRYPTO_AES_ARM) += aes-arm.o
7 obj-$(CONFIG_CRYPTO_AES_ARM_BS) += aes-arm-bs.o
8 obj-$(CONFIG_CRYPTO_SHA1_ARM) += sha1-arm.o
9 obj-$(CONFIG_CRYPTO_SHA1_ARM_NEON) += sha1-arm-neon.o
10 obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o
11 obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha512-arm.o
12 obj-$(CONFIG_CRYPTO_BLAKE2S_ARM) += libblake2s-arm.o
15 obj-$(CONFIG_CRYPTO_POLY1305_ARM) += poly1305-arm.o
19 obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o
20 obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o
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/openbmc/linux/tools/perf/pmu-events/arch/arm64/
H A Dmapfile.csv15 0x00000000410fd020,v1,arm/cortex-a34,core
16 0x00000000410fd030,v1,arm/cortex-a53,core
17 0x00000000420f1000,v1,arm/cortex-a53,core
18 0x00000000410fd040,v1,arm/cortex-a35,core
19 0x00000000410fd050,v1,arm/cortex-a55,core
20 0x00000000410fd060,v1,arm/cortex-a65-e1,core
21 0x00000000410fd4a0,v1,arm/cortex-a65-e1,core
22 0x00000000410fd070,v1,arm/cortex-a57-a72,core
23 0x00000000410fd080,v1,arm/cortex-a57-a72,core
24 0x00000000410fd090,v1,arm/cortex-a73,core
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/openbmc/openbmc/meta-arm/meta-arm-toolchain/conf/distro/include/
H A Dtcmode-external-arm.inc2 # Configuration to use an external Arm binary toolchain
5 EXTERNAL_TOOLCHAIN ?= "/usr/local/arm-binary-toolchain/${TARGET_ARCH}"
7 # oe-core passes this by default because it assumes GCC 13. This can be removed when Arm GCC is 13.…
13 …AT_TARGET_SYS:arm ?= "${@ 'arm-none-linux-gnueabihf' if os.path.exists('${EXTERNAL_TOOLCHAIN}/bin/
19 EXTERNAL_TOOLCHAIN_DYN_LINKER_PATH:arm ?= " -Wl,--dynamic-linker=${EXTERNAL_TOOLCHAIN_LIBDIR}/ld-li…
23 EAT_LIBDIR:arm = "lib"
34 SKIP_RECIPE[gcc-cross-arm] = "Using external toolchain"
38 PREFERRED_PROVIDER_linux-libc-headers = "external-arm-toolchain"
39 PREFERRED_PROVIDER_linux-libc-headers-dev = "external-arm-toolchain"
40 PREFERRED_PROVIDER_virtual/${TARGET_PREFIX}gcc = "external-arm-toolchain"
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/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhip04.dtsi89 compatible = "arm,cortex-a15";
94 compatible = "arm,cortex-a15";
99 compatible = "arm,cortex-a15";
104 compatible = "arm,cortex-a15";
109 compatible = "arm,cortex-a15";
114 compatible = "arm,cortex-a15";
119 compatible = "arm,cortex-a15";
124 compatible = "arm,cortex-a15";
129 compatible = "arm,cortex-a15";
134 compatible = "arm,cortex-a15";
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