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/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellx/
Duncore-memory.json
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellde/
Duncore-memory.json
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswellx/
Duncore-memory.json
/openbmc/qemu/tests/qtest/
H A Dtpm-tis-util.c36 DPRINTF("%s: %d: locty=%d l=%d access=0x%02x pending_request_flag=0x%x\n", \
37 __func__, __LINE__, locty, l, access, pending_request_flag)
48 uint8_t access; in tpm_tis_test_check_localities() local
55 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_localities()
56 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_test_check_localities()
78 uint8_t access; in tpm_tis_test_check_access_reg() local
82 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg()
83 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_test_check_access_reg()
89 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg()
90 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_test_check_access_reg()
[all …]
H A Dtpm-tis-i2c-test.c33 DPRINTF("%s: %d: locty=%d l=%d access=0x%02x pending_request_flag=0x%x\n", \
34 __func__, __LINE__, locty, l, access, pending_request_flag)
94 uint8_t access; in tpm_tis_i2c_test_basic() local
99 * active locality. Therefore, ensure access is released. in tpm_tis_i2c_test_basic()
103 access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS); in tpm_tis_i2c_test_basic()
104 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_i2c_test_basic()
150 /* release access */ in tpm_tis_i2c_test_basic()
163 uint8_t access; in tpm_tis_i2c_test_check_localities() local
169 access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS); in tpm_tis_i2c_test_check_localities()
170 g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS | in tpm_tis_i2c_test_check_localities()
[all …]
/openbmc/linux/Documentation/admin-guide/LSM/
DSmack.rst
/openbmc/linux/tools/perf/pmu-events/arch/x86/skylakex/
Duncore-memory.json
/openbmc/skeleton/libopenbmc_intf/
H A Dopenbmc_intf.xml3 <property name="poll_interval" type="i" access="read"/>
4 <property name="sysfs_path" type="s" access="read"/>
5 <property name="scale" type="i" access="read"/>
17 <property name="speed" type="i" access="readwrite"/>
18 <property name="cooling_zone" type="i" access="readwrite"/>
19 <property name="pwm_num" type="i" access="readwrite"/>
34 <property name="value" type="v" access="read"/>
35 <property name="units" type="s" access="read"/>
36 <property name="poll_interval" type="i" access="readwrite"/>
37 <property name="heatbeat" type="i" access="read"/>
[all …]
/openbmc/qemu/gdb-xml/
H A Ds390-acr.xml10 <reg name="acr0" bitsize="32" type="uint32" group="access"/>
11 <reg name="acr1" bitsize="32" type="uint32" group="access"/>
12 <reg name="acr2" bitsize="32" type="uint32" group="access"/>
13 <reg name="acr3" bitsize="32" type="uint32" group="access"/>
14 <reg name="acr4" bitsize="32" type="uint32" group="access"/>
15 <reg name="acr5" bitsize="32" type="uint32" group="access"/>
16 <reg name="acr6" bitsize="32" type="uint32" group="access"/>
17 <reg name="acr7" bitsize="32" type="uint32" group="access"/>
18 <reg name="acr8" bitsize="32" type="uint32" group="access"/>
19 <reg name="acr9" bitsize="32" type="uint32" group="access"/>
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/
Drecommended.json
/openbmc/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
Duncore-memory.json
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwell/
Duncore-cache.json
/openbmc/linux/tools/perf/pmu-events/arch/x86/skylake/
Duncore-cache.json
/openbmc/linux/tools/testing/selftests/bpf/verifier/
Ddirect_value_access.c
Dctx_skb.c
/openbmc/linux/arch/mips/include/asm/octeon/
Dcvmx-fau.h
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/
Duncore-memory.json
/openbmc/u-boot/drivers/spi/
H A DKconfig12 the SPI uclass. Drivers provide methods to access the SPI
32 access the SPI NOR flash on platforms embedding this Altera
41 used to access the SPI NOR flash on boards using the Aspeed
55 used to access the SPI flash on AE3XX and AE250 platforms embedding
63 to access SPI NOR flash and other SPI peripherals. This driver
72 many AT91 (ARM) chips. This driver can be used to access
80 access the SPI NOR flash on platforms embedding this Broadcom
88 access the SPI NOR flash on platforms embedding these Broadcom
95 be used to access the SPI flash on platforms embedding this
102 used to access the SPI NOR flash on platforms embedding this
[all …]
/openbmc/u-boot/doc/
H A DREADME.unaligned-memory-access.txt8 when it comes to memory access. This document presents some details about
13 The definition of an unaligned access
20 access.
22 The above may seem a little vague, as memory access can happen in different
26 which will compile to multiple-byte memory access instructions, namely when
41 of memory access. However, we must consider ALL supported architectures;
46 Why unaligned access is bad
49 The effects of performing an unaligned memory access vary from architecture
56 happen. The exception handler is able to correct the unaligned access,
60 unaligned access to be corrected.
[all …]
/openbmc/linux/include/linux/
Dkcsan-checks.h
/openbmc/hiomapd/vpnor/
H A DREADME.md7 Enabling the feature virtualises both the host's access to the flash (the mbox
8 protocol), and the BMC's access to the flash (via some filesystem on top of the
28 1. The FFS ToC defines the set of valid access ranges in terms of partitions
31 4. Read access to valid ranges must be granted
32 5. Write access to valid ranges may be granted
33 6. Access ranges that are valid may map into a backing file associated with the
35 7. A read of a valid access range that maps into the backing file will render
37 8. A read of a valid access range that does not map into the backing file will
39 9. A read of an invalid access range will appear erased
40 10. A write to a valid access range that maps into the backing file will update
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dtlb-insns.c514 .opc1 = CP_ANY, .opc2 = 0, .access = PL1_W, .writefn = tlbiall_write,
517 .opc1 = CP_ANY, .opc2 = 1, .access = PL1_W, .writefn = tlbimva_write,
520 .opc1 = CP_ANY, .opc2 = 2, .access = PL1_W, .writefn = tlbiasid_write,
523 .opc1 = CP_ANY, .opc2 = 3, .access = PL1_W, .writefn = tlbimvaa_write,
530 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
533 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
536 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
540 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
543 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
546 .type = ARM_CP_NO_RAW, .access = PL1_W, .accessfn = access_ttlb,
[all …]
/openbmc/phosphor-mboxd/vpnor/
H A DREADME.md8 Enabling the feature virtualises both the host's access to the flash (the mbox
9 protocol), and the BMC's access to the flash (via some filesystem on top of the
32 1. The FFS ToC defines the set of valid access ranges in terms of partitions
35 4. Read access to valid ranges must be granted
36 5. Write access to valid ranges may be granted
37 6. Access ranges that are valid may map into a backing file associated with
39 7. A read of a valid access range that maps into the backing file will render
41 8. A read of a valid access range that does not map into the backing file will
43 9. A read of an invalid access range will appear erased
44 10. A write to a valid access range that maps into the backing file will update
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a65-e1/
Dcache.json
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivybridge/
Duncore-cache.json

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