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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra20-pinmux.yaml35 enum: [ ata, atb, atc, atd, ate, cdev1, cdev2, crtp, csus, dap1,
102 atb {
103 nvidia,pins = "atb", "gma", "gme";
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dqcom,coresight-tpda.yaml14 master ATB interface. Performing an arbitrated ATB interleaving (funneling)
H A Dqcom,coresight-tpdm.yaml15 domain and transfers it to the data collection time domain, generally ATB
H A Darm,coresight-tmc.yaml100 description: AXI or ATB Master output connection. Used for ETR
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-trimslice.dts48 atb {
49 nvidia,pins = "atb", "gma";
211 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
H A Dtegra20-tamonten.dtsi42 atb {
43 nvidia,pins = "atb", "gma", "gme";
185 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
H A Dtegra20-paz00.dts64 atb {
65 nvidia,pins = "atb", "gma", "gme";
201 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
H A Dtegra20-ventana.dts58 atb {
59 nvidia,pins = "atb", "gma", "gme";
208 nvidia,pins = "ata", "atb", "atc", "atd",
H A Dtegra20-harmony.dts56 atb {
57 nvidia,pins = "atb", "gma", "gme";
203 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
H A Dtegra20-seaboard.dts56 atb {
57 nvidia,pins = "atb", "gma", "gme";
206 nvidia,pins = "ata", "atb", "atc", "atd",
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20-tamonten.dtsi31 atb {
32 nvidia,pins = "atb", "gma", "gme";
174 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
H A Dtegra20-paz00.dts80 atb {
81 nvidia,pins = "atb", "gma", "gme";
217 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
H A Dtegra20-ventana.dts77 atb {
78 nvidia,pins = "atb", "gma", "gme";
227 nvidia,pins = "ata", "atb", "atc", "atd",
H A Dtegra20-harmony.dts77 atb {
78 nvidia,pins = "atb", "gma", "gme";
224 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
/openbmc/u-boot/arch/powerpc/dts/
H A De6500_power_isa.dtsi14 power-isa-atb; // Alternate Time Base
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A De500v1_power_isa.dtsi40 power-isa-atb; // Alternate Time Base
H A De500v2_power_isa.dtsi40 power-isa-atb; // Alternate Time Base
H A De500mc_power_isa.dtsi40 power-isa-atb; // Alternate Time Base
H A De5500_power_isa.dtsi40 power-isa-atb; // Alternate Time Base
H A De6500_power_isa.dtsi40 power-isa-atb; // Alternate Time Base
/openbmc/qemu/hw/ppc/
H A Dppc.c676 uint64_t tb, atb, vmclk; in cpu_ppc_tb_stop() local
684 atb = cpu_ppc_get_tb(tb_env, vmclk, tb_env->atb_offset); in cpu_ppc_tb_stop()
688 cpu_ppc_store_tb(tb_env, vmclk, &tb_env->atb_offset, atb); in cpu_ppc_tb_stop()
698 uint64_t tb, atb, vmclk; in cpu_ppc_tb_start() local
706 atb = tb_env->atb_offset; in cpu_ppc_tb_start()
712 cpu_ppc_store_tb(tb_env, vmclk, &tb_env->atb_offset, atb); in cpu_ppc_tb_start()
/openbmc/linux/Documentation/networking/device_drivers/appletalk/
H A Dcops.rst21 - Tangent ATB-II, Novell NL-1000, Daystar Digital LT-200
/openbmc/linux/drivers/clk/samsung/
H A Dclk-cpu.c196 * In Exynos4210, ATB clock parent is also mout_core. So in exynos_cpuclk_pre_rate_change()
197 * ATB clock also needs to be mantained at safe speed. in exynos_cpuclk_pre_rate_change()
/openbmc/linux/drivers/clk/
H A Dclk-npcm8xx.c365 hw = devm_clk_hw_register_fixed_factor(dev, "atb", "axi", 0, 1, 2); in npcm8xx_clk_probe()
367 return dev_err_probe(dev, PTR_ERR(hw), "Can't register atb div2\n"); in npcm8xx_clk_probe()
/openbmc/linux/kernel/rcu/
H A Dtree_stall.h843 bool atb = false; in rcu_check_boost_fail() local
854 atb = true; in rcu_check_boost_fail()
861 atb = true; in rcu_check_boost_fail()
878 return atb; in rcu_check_boost_fail()

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