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Searched full:aclk_hdcp (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Drk3228-cru.h86 #define ACLK_HDCP 206 macro
H A Drk3368-cru.h96 #define ACLK_HDCP 201 macro
H A Drk3328-cru.h128 #define ACLK_HDCP 157 macro
H A Drk3399-cru.h170 #define ACLK_HDCP 222 macro
H A Drk3568-cru.h290 #define ACLK_HDCP 227 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3368-cru.h99 #define ACLK_HDCP 201 macro
H A Drk3328-cru.h127 #define ACLK_HDCP 217 macro
H A Drk3399-cru.h168 #define ACLK_HDCP 222 macro
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Drockchip,power-controller.yaml245 clocks = <&cru ACLK_HDCP>,
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3399.c1095 COMPOSITE(ACLK_HDCP, "aclk_hdcp", mux_pll_src_cpll_gpll_ppll_p, 0,
1098 COMPOSITE_NOMUX(HCLK_HDCP, "hclk_hdcp", "aclk_hdcp", 0,
1101 COMPOSITE_NOMUX(PCLK_HDCP, "pclk_hdcp", "aclk_hdcp", 0,
1105 GATE(ACLK_HDCP_NOC, "aclk_hdcp_noc", "aclk_hdcp", CLK_IGNORE_UNUSED,
1107 GATE(ACLK_HDCP22, "aclk_hdcp22", "aclk_hdcp", 0,
H A Dclk-rk3228.c540 GATE(ACLK_HDCP, "aclk_hdcp", "aclk_hdcp_pre", 0, RK2928_CLKGATE_CON(14), 10, GFLAGS),
H A Dclk-rk3328.c711 GATE(ACLK_HDCP, "aclk_hdcp", "aclk_vio_pre", 0, RK3328_CLKGATE_CON(21), 15, GFLAGS),
H A Dclk-rk3368.c724 GATE(ACLK_HDCP, "aclk_hdcp", "aclk_rga_pre", 0, RK3368_CLKGATE_CON(17), 10, GFLAGS),
H A Dclk-rk3568.c1060 GATE(ACLK_HDCP, "aclk_hdcp", "aclk_vo", 0,
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3399.c929 case ACLK_HDCP: in rk3399_clk_get_rate()
1003 case ACLK_HDCP: in rk3399_clk_set_rate()
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-scarlet.dtsi378 <&cru ACLK_HDCP>,
H A Drk3399-gru.dtsi360 <&cru ACLK_VIO>, <&cru ACLK_HDCP>,
H A Drk3399.dtsi1187 clocks = <&cru ACLK_HDCP>,
1512 <&cru ACLK_VIO>, <&cru ACLK_HDCP>,
/openbmc/u-boot/arch/arm/dts/
H A Drk3399-gru.dtsi366 <&cru ACLK_VIO>, <&cru ACLK_HDCP>,
H A Drk3399.dtsi1022 clocks = <&cru ACLK_HDCP>,
1296 <&cru ACLK_VIO>, <&cru ACLK_HDCP>,
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk322x.dtsi202 clocks = <&cru ACLK_HDCP>,