Searched full:a6xx (Results 1 – 18 of 18) sorted by relevance
90 For a5xx and a6xx devices this node contains a memory-region that208 then: # Starting with A6xx, the clocks are usually defined in the GMU node272 // Example a6xx (with GMU):
16 to members of the Adreno A6xx GPU family. The GMU provides on-device power
25 ADRENO_FW_SQE = 0, /* a6xx */27 ADRENO_FW_GMU = 1, /* a6xx */205 * for all a6xx devices, but probably best to limit this in adreno_patchid()463 * For a5xx and a6xx targets load the zap shader that is used to pull the GPU
9 #include "a6xx.xml.h"
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a6xx.xml ( 198949 byte…56 A6XX = 6, enumerator
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/adreno/a6xx.xml ( 198949 byte…
7 #include "a6xx.xml.h"
96 /* HSI48RDYIE: only on STM32L496xx/4A6xx devices */107 /* HSI48RDYF: only on STM32L496xx/4A6xx devices */119 /* HSI48RDYC: only on STM32L496xx/4A6xx devices */
292 * switch-over happened early enough in mesa a6xx bringup that we293 * can disallow relocs for a6xx and newer.
48 * - 1.8.0 - Add MSM_BO_CACHED_COHERENT for supported GPUs (a6xx)
79 /* TCBGTIE only on STM32L496xx/4A6xx devices */145 /* TCBGTCF only on STM32L496xx/4A6xx devices */
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