/openbmc/linux/Documentation/userspace-api/media/v4l/ |
H A D | metafmt-vsp1-hgo.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 3 .. _v4l2-meta-fmt-vsp1-hgo: 9 Renesas R-Car VSP1 1-D Histogram Data 15 This format describes histogram data generated by the Renesas R-Car VSP1 1-D 20 computes the minimum, maximum and sum of all pixels as well as per-channel 28 - In *64 bins normal mode*, the HGO operates on the three channels independently 29 to compute three 64-bins histograms. RGB, YCbCr and HSV image formats are 31 - In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B) 32 channels to compute a single 64-bins histogram. Only the RGB image format is 34 - In *256 bins normal mode*, the HGO operates on the Y channel to compute a [all …]
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/openbmc/linux/arch/alpha/include/asm/ |
H A D | xor.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * include/asm-alpha/xor.h 5 * Optimized RAID-5 checksumming functions for alpha EV5 and EV6 63 ldq $7,24($18) \n\ 73 xor $0,$1,$0 # 7 cycles from $1 load \n\ 81 xor $6,$7,$6 \n\ 117 ldq $7,16($18) \n\ 132 xor $6,$7,$7 # 6 cycles from $7 load \n\ 141 xor $7,$20,$20 # 7 cycles from $20 load \n\ 143 xor $22,$23,$23 # 7 cycles from $23 load \n\ [all …]
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/openbmc/linux/arch/powerpc/crypto/ |
H A D | poly1305-p10le_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 # Copyright 2023- IBM Corp. All rights reserved 10 # Poly1305 - this version mainly using vector/VSX/Scalar 11 # - 26 bits limbs 12 # - Handle multiple 64 byte blcok. 17 # p = 2^130 - 5 25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, … 56 #include <asm/asm-offsets.h> 57 #include <asm/asm-compat.h> 95 stdu 1,-752(1) [all …]
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H A D | chacha-p10le-8x.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 # Copyright 2023- IBM Corp. All rights reserved 17 # 4. c += d; b ^= c; b <<<= 7 22 # row3 = (row3 + row4), row2 = row3 xor row2, row2 rotate each word by 7 43 #include <asm/asm-offsets.h> 44 #include <asm/asm-compat.h> 81 stdu 1,-752(1) 100 SAVE_GPR 31, 248, 1 114 SAVE_VRS 31, 176, 9 133 SAVE_VSX 31, 464, 9 [all …]
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/openbmc/u-boot/board/keymile/km_arm/ |
H A D | kwbimage_256M8_1.cfg | 1 # SPDX-License-Identifier: GPL-2.0+ 7 # Refer doc/README.kwbimage for more details about how-to configure 10 # This configuration applies to COGE5 design (ARM-part) 11 # Two 8-Bit devices are connected on the 16-Bit bus on the same 12 # chip-select. The supported devices are 13 # MT47H256M8EB-3IT:C 14 # MT47H256M8EB-25EIT:C 20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2]) 21 # bit 7-4: 2, MPPSel1 SPI_MOSI (1=NF_IO[3]) 22 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4]) [all …]
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H A D | kwbimage_128M16_1.cfg | 1 # SPDX-License-Identifier: GPL-2.0+ 12 # Refer doc/README.kwbimage for more details about how-to configure 20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2]) 21 # bit 7-4: 2, MPPSel1 SPI_SI (1=NF_IO[3]) 22 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4]) 23 # bit 15-12: 2, MPPSel3 SPI_SO (1=NF_IO[5]) 24 # bit 19-16: 1, MPPSel4 NF_IO[6] 25 # bit 23-20: 1, MPPSel5 NF_IO[7] 26 # bit 27-24: 1, MPPSel6 SYSRST_O 27 # bit 31-28: 0, MPPSel7 GPO[7] [all …]
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/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7603/ |
H A D | mac.h | 1 /* SPDX-License-Identifier: ISC */ 7 #define MT_RXD0_PKT_TYPE GENMASK(31, 29) 24 PKT_TYPE_RX_EVENT = 7, 27 #define MT_RXD1_NORMAL_BSSID GENMASK(31, 26) 33 #define MT_RXD1_NORMAL_KEY_ID GENMASK(7, 6) 41 #define MT_RXD2_NORMAL_NON_AMPDU BIT(31) 59 #define MT_RXD2_NORMAL_WLAN_IDX GENMASK(7, 0) 61 #define MT_RXD3_NORMAL_PF_STS GENMASK(31, 30) 70 #define MT_RXD3_NORMAL_RXV_SEQ GENMASK(7, 0) 72 #define MT_RXV1_VHTA1_B5_B4 GENMASK(31, 30) [all …]
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/openbmc/linux/drivers/net/ipa/reg/ |
H A D | ipa_reg-v3.1.c | 1 // SPDX-License-Identifier: GPL-2.0 16 /* Bits 5-31 reserved */ 29 [CLKON_HPS] = BIT(7), 39 /* Bits 17-31 reserved */ 48 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7), 50 /* Bits 22-23 reserved */ 52 /* Bits 25-31 reserved */ 59 [MEM_BADDR] = GENMASK(31, 16), 66 [GEN_QMB_1_MAX_WRITES] = GENMASK(7, 4), 67 /* Bits 8-31 reserved */ [all …]
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H A D | ipa_reg-v5.0.c | 1 // SPDX-License-Identifier: GPL-2.0 11 [MAX_PIPES] = GENMASK(7, 0), 14 [PROD_LOWEST] = GENMASK(31, 24), 27 [GSI_MULTI_INORDER_RD_DIS] = BIT(7), 43 /* Bits 28-29 reserved */ 45 [GEN_QMB_0_DYNAMIC_ASIZE] = BIT(31), 58 [CLKON_HPS] = BIT(7), 82 [DRBIP] = BIT(31), 88 [ROUTE_DEF_PIPE] = GENMASK(7, 0), 94 /* Bits 29-31 reserved */ [all …]
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H A D | ipa_reg-v4.2.c | 1 // SPDX-License-Identifier: GPL-2.0 18 [GSI_MULTI_INORDER_RD_DIS] = BIT(7), 29 /* Bits 21-31 reserved */ 42 [CLKON_HPS] = BIT(7), 65 /* Bits 30-31 reserved */ 74 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7), 76 /* Bits 22-23 reserved */ 78 /* Bits 25-31 reserved */ 85 [MEM_BADDR] = GENMASK(31, 16), 92 [GEN_QMB_1_MAX_WRITES] = GENMASK(7, 4), [all …]
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H A D | ipa_reg-v3.5.1.c | 1 // SPDX-License-Identifier: GPL-2.0 16 /* Bits 5-31 reserved */ 29 [CLKON_HPS] = BIT(7), 44 /* Bits 22-31 reserved */ 53 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7), 55 /* Bits 22-23 reserved */ 57 /* Bits 25-31 reserved */ 64 [MEM_BADDR] = GENMASK(31, 16), 71 [GEN_QMB_1_MAX_WRITES] = GENMASK(7, 4), 72 /* Bits 8-31 reserved */ [all …]
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H A D | ipa_reg-v4.5.c | 1 // SPDX-License-Identifier: GPL-2.0 18 [GSI_MULTI_INORDER_RD_DIS] = BIT(7), 30 /* Bits 22-31 reserved */ 43 [CLKON_HPS] = BIT(7), 67 /* Bit 31 reserved */ 76 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7), 78 /* Bits 22-23 reserved */ 80 /* Bits 25-31 reserved */ 87 [MEM_BADDR] = GENMASK(31, 16), 94 [GEN_QMB_1_MAX_WRITES] = GENMASK(7, 4), [all …]
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H A D | ipa_reg-v4.11.c | 1 // SPDX-License-Identifier: GPL-2.0 18 [GSI_MULTI_INORDER_RD_DIS] = BIT(7), 34 /* Bits 24-29 reserved */ 36 [GEN_QMB_0_DYNAMIC_ASIZE] = BIT(31), 49 [CLKON_HPS] = BIT(7), 73 [DRBIP] = BIT(31), 82 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7), 84 /* Bits 22-23 reserved */ 86 /* Bits 25-31 reserved */ 93 [MEM_BADDR] = GENMASK(31, 16), [all …]
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H A D | ipa_reg-v4.7.c | 1 // SPDX-License-Identifier: GPL-2.0 18 [GSI_MULTI_INORDER_RD_DIS] = BIT(7), 30 /* Bits 22-31 reserved */ 43 [CLKON_HPS] = BIT(7), 67 [DRBIP] = BIT(31), 76 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7), 78 /* Bits 22-23 reserved */ 80 /* Bits 25-31 reserved */ 87 [MEM_BADDR] = GENMASK(31, 16), 94 [GEN_QMB_1_MAX_WRITES] = GENMASK(7, 4), [all …]
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H A D | ipa_reg-v4.9.c | 1 // SPDX-License-Identifier: GPL-2.0 18 [GSI_MULTI_INORDER_RD_DIS] = BIT(7), 33 /* Bits 25-29 reserved */ 35 [GEN_QMB_0_DYNAMIC_ASIZE] = BIT(31), 48 [CLKON_HPS] = BIT(7), 72 [DRBIP] = BIT(31), 81 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7), 83 /* Bits 22-23 reserved */ 85 /* Bits 25-31 reserved */ 92 [MEM_BADDR] = GENMASK(31, 16), [all …]
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/openbmc/linux/drivers/net/wireless/mediatek/mt76/ |
H A D | mt76_connac3_mac.h | 1 /* SPDX-License-Identifier: ISC */ 26 #define MT_RXD0_PKT_TYPE GENMASK(31, 27) 34 #define MT_RXD0_SW_PKT_TYPE_MASK GENMASK(31, 16) 53 #define MT_RXD1_NORMAL_SEC_DONE BIT(31) 58 #define MT_RXD2_NORMAL_HDR_TRANS BIT(7) 71 #define MT_RXD2_NORMAL_BF_REPORT BIT(31) 74 #define MT_RXD3_NORMAL_RXV_SEQ GENMASK(7, 0) 83 #define MT_RXD3_NORMAL_VLAN2ETH BIT(31) 97 #define MT_RXD10_QOS_CTL GENMASK(31, 16) 99 #define MT_RXD11_HT_CONTROL GENMASK(31, 0) [all …]
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H A D | mt76_connac2_mac.h | 1 /* SPDX-License-Identifier: ISC */ 41 #define MT_TX_FREE_PAIR BIT(31) 45 #define MT_TXD0_Q_IDX GENMASK(31, 25) 50 #define MT_TXD1_LONG_FORMAT BIT(31) 62 #define MT_TXD2_FIX_RATE BIT(31) 73 #define MT_TXD2_NDPA BIT(7) 78 #define MT_TXD3_SN_VALID BIT(31) 92 #define MT_TXD4_PN_LOW GENMASK(31, 0) 94 #define MT_TXD5_PN_HIGH GENMASK(31, 16) 100 #define MT_TXD5_PID GENMASK(7, 0) [all …]
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/openbmc/linux/tools/arch/x86/kcpuid/ |
H A D | cpuid.csv | 5 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs 9 1, 0, EAX, 7:4, model, Model 15 1, 0, EBX, 7:0, brand, Brand Index 18 1, 0, EBX, 31:24, apic_id, Initial APIC ID 22 1, 0, ECX, 2, dtes64, DS area uses 64-bit layout 27 1, 0, ECX, 7, eist, Enhanced Intel SpeedStep Technology 33 1, 0, ECX, 13, cmpxchg16b, 'CMPXCHG16B - Compare and Exchange Bytes' supported 36 1, 0, ECX, 17, pcid, Process-Context Identifiers feature present 43 …1, 0, ECX, 24, tsc_deadline_timer, LAPIC supports one-shot operation using a TSC deadline … 48 1, 0, ECX, 29, f16c, 16-bit floating-point conversion instruction supported [all …]
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/openbmc/linux/tools/testing/selftests/hid/tests/ |
H A D | test_multitouch.py | 2 # SPDX-License-Identifier: GPL-2.0 3 # -*- coding: utf-8 -*- 20 KERNEL_MODULE = ("hid-multitouch", "hid_multitouch") 35 "CONFIDENCE": BIT(7), 302 Report Size (7) 310 Unit Exponent (-1) 335 Unit Exponent (-4) 370 Report Size (7) 378 Unit Exponent (-1) 397 Unit Exponent (-4) [all …]
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/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7615/ |
H A D | mac.h | 1 /* SPDX-License-Identifier: ISC */ 12 #define MT_RXD0_PKT_TYPE GENMASK(31, 29) 22 #define MT_RXD1_NORMAL_BSSID GENMASK(31, 26) 31 #define MT_RXD1_NORMAL_KEY_ID GENMASK(7, 6) 41 #define MT_RXD2_NORMAL_NON_AMPDU BIT(31) 59 #define MT_RXD2_NORMAL_WLAN_IDX GENMASK(7, 0) 61 #define MT_RXD3_NORMAL_PF_STS GENMASK(31, 30) 70 #define MT_RXD3_NORMAL_RXV_SEQ GENMASK(7, 0) 75 #define MT_RXD6_QOS_CTL GENMASK(31, 16) 77 #define MT_RXD7_HT_CONTROL GENMASK(31, 0) [all …]
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/openbmc/linux/Documentation/translations/zh_CN/core-api/ |
H A D | packing.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 3 .. include:: ../disclaimer-zh_CN.rst 5 :Original: Documentation/core-api/packing.rst 22 -------- 42 -------- 46 - 将一个CPU可使用的数字打包到内存缓冲区中(具有硬件约束/特殊性)。 47 - 将内存缓冲区(具有硬件约束/特殊性)解压缩为一个CPU可使用的数字。 54 以下示例介绍了打包u64字段的内存布局。打包缓冲区中的字节偏移量始终默认为0,1...7。 62 7 6 5 4 63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 [all …]
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/openbmc/qemu/include/hw/ppc/ |
H A D | xive2_regs.h | 4 * Copyright (c) 2019-2022, IBM Corporation. 7 * COPYING file in the top-level directory. 25 #define TM2_QW0W2_LOGIC_SERV PPC_BITMASK32(4, 31) 28 #define TM2_QW1W2_OS_CAM PPC_BITMASK32(4, 31) 31 #define TM2_QW2W2_POOL_CAM PPC_BITMASK32(4, 31) 35 #define TM2_QW3W2_LE PPC_BIT32(7) 44 #define EAS2_END_BLOCK PPC_BITMASK(4, 7) /* Destination EQ block# */ 45 #define EAS2_END_INDEX PPC_BITMASK(8, 31) /* Destination EQ index */ 50 #define xive2_eas_is_valid(eas) (be64_to_cpu((eas)->w) & EAS2_VALID) 51 #define xive2_eas_is_masked(eas) (be64_to_cpu((eas)->w) & EAS2_MASKED) [all …]
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/openbmc/linux/arch/arm64/tools/ |
H A D | sysreg | 1 # SPDX-License-Identifier: GPL-2.0-only 44 # NI - Not implemented 45 # IMP - Implemented 53 Field 31:0 DTRRX 57 Res0 63:31 69 Field 31 TFO 85 Res0 11:7 93 Field 31:0 DTRTX 98 Field 31:0 EDECCR 108 UnsignedEnum 31:28 RAS [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/include/nvhw/class/ |
H A D | cl5039.h | 2 * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved. 30 …_NO_OPERATION_V 31:0 33 …_SET_CONTEXT_DMA_NOTIFY_HANDLE 31:0 36 …_SET_CONTEXT_DMA_BUFFER_IN_HANDLE 31:0 39 …_SET_CONTEXT_DMA_BUFFER_OUT_HANDLE 31:0 49 …_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 65 …_SET_SRC_WIDTH_V 31:0 68 …_SET_SRC_HEIGHT_V 31:0 71 …_SET_SRC_DEPTH_V 31:0 74 …_SET_SRC_LAYER_V 31:0 [all …]
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H A D | cl502d.h | 2 * Copyright (c) 2003 - 2004, NVIDIA CORPORATION. All rights reserved. 30 …_WAIT_FOR_IDLE_V 31:0 33 …_SET_DST_CONTEXT_DMA_HANDLE 31:0 36 …_SET_SRC_CONTEXT_DMA_HANDLE 31:0 39 …_SET_SEMAPHORE_CONTEXT_DMA_HANDLE 31:0 42 …_SET_DST_FORMAT_V 7:0 78 …_SET_DST_PITCH_V 31:0 81 …_SET_DST_WIDTH_V 31:0 84 …_SET_DST_HEIGHT_V 31:0 87 …_SET_DST_OFFSET_UPPER_V 7:0 [all …]
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