| /openbmc/linux/include/linux/ |
| H A D | math64.h | 10 #if BITS_PER_LONG == 64
16 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
17 * @dividend: unsigned 64bit dividend
18 * @divisor: unsigned 32bit divisor
19 * @remainder: pointer to unsigned 32bit remainder
23 * This is commonly provided by 32bit archs to provide an optimized 64bit
33 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
34 * @dividend: signed 64bit dividend
35 * @divisor: signed 32bit divisor
36 * @remainder: pointer to signed 32bit remainder
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| H A D | exportfs.h | 33 * 32bit inode number, 32 bit generation number.
38 * 32bit inode number, 32 bit generation number,
39 * 32 bit parent directory inode number.
44 * 64 bit object ID, 64 bit root object ID,
45 * 32 bit generation number.
50 * 64 bit object ID, 64 bit root object ID,
51 * 32 bit generation number,
52 * 64 bit parent object ID, 32 bit parent generation.
57 * 64 bit object ID, 64 bit root object ID,
58 * 32 bit generation number,
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| /openbmc/linux/drivers/mtd/nand/raw/ |
| H A D | nand_ids.c | 29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNQGAMA 64G 3.3V 8-bit",
50 {"SDTNRGAMA 64G 3.3V 8-bit",
53 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
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| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | nand_ids.c | 28 LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS),
29 LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS),
30 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS),
31 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS),
32 LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS),
33 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS),
35 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS),
42 {"TC58NVG0S3E 1G 3.3V 8-bit",
44 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512),
46 {"TC58NVG2S0F 4G 3.3V 8-bit",
[all …]
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| /openbmc/openbmc/poky/meta/classes-recipe/ |
| H A D | siteinfo.bbclass | 18 # * bits: Returns the bit size of the target, either "32" or "64"
26 …"allarch": "endian-little bit-32", # bogus, but better than special-casing the checks below for al…
27 "aarch64": "endian-little bit-64 arm-common arm-64",
28 "aarch64_be": "endian-big bit-64 arm-common arm-64",
29 "arc": "endian-little bit-32 arc-common",
30 "arceb": "endian-big bit-32 arc-common",
31 "arm": "endian-little bit-32 arm-common arm-32",
32 "armeb": "endian-big bit-32 arm-common arm-32",
33 "avr32": "endian-big bit-32 avr32-common",
34 "bfin": "endian-little bit-32 bfin-common",
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| /openbmc/linux/arch/x86/crypto/ |
| H A D | Kconfig | 7 depends on X86 && 64BIT
29 Architecture: x86 (32-bit and 64-bit) using:
34 depends on X86 && 64BIT
46 depends on X86 && 64BIT
57 depends on X86 && 64BIT
71 depends on X86 && 64BIT
82 depends on X86 && 64BIT
99 depends on X86 && 64BIT
117 depends on X86 && 64BIT
131 depends on X86 && 64BIT
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| /openbmc/linux/lib/ |
| H A D | atomic64_test.c | 20 #define TEST(bit, op, c_op, val) \ argument
22 atomic##bit##_set(&v, v0); \
24 atomic##bit##_##op(val, &v); \
26 WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
27 (unsigned long long)atomic##bit##_read(&v), \
33 * @test should be a macro accepting parameters (bit, op, ...)
36 #define FAMILY_TEST(test, bit, op, args...) \ argument
38 test(bit, op, ##args); \
39 test(bit, op##_acquire, ##args); \
40 test(bit, op##_release, ##args); \
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| /openbmc/linux/arch/parisc/ |
| H A D | Kconfig | 5 select ARCH_32BIT_OFF_T if !64BIT
17 select ARCH_SPLIT_ARG64 if !64BIT
37 select GENERIC_ATOMIC64 if !64BIT
86 select HAVE_FUNCTION_DESCRIPTORS if 64BIT
120 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
139 default 18 if 64BIT
146 default 18 if 64BIT
173 default 3 if 64BIT && PARISC_PAGE_SIZE_4KB
187 that can run on all 32-bit PA CPUs (albeit not optimally fast),
190 Specifying "PA8000" here will allow you to select a 64-bit kernel
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| /openbmc/linux/drivers/net/ethernet/cavium/liquidio/ |
| H A D | cn23xx_pf_regs.h | 74 /* 2 scatch registers (64-bit) */
80 /* 1 registers (64-bit) - SLI_CTL_STATUS */
83 /* SLI Packet Input Jabber Register (64 bit register)
117 /* 4 registers (64-bit) for mapping IOQs to MACs(PEMs)-
122 /*1 register (64-bit) to determine whether IOQs are in reset. */
141 /* Starting bit of the TRS field in CN23XX_SLI_PKT_MAC_RINFO64 register */
143 /* Starting bit of SRN field in CN23XX_SLI_PKT_MAC_RINFO64 register */
145 /* Starting bit of RPVF field in CN23XX_SLI_PKT_MAC_RINFO64 register */
147 /* Starting bit of NVFS field in CN23XX_SLI_PKT_MAC_RINFO64 register */
152 /* 64 registers for Input Queue Instr Count - SLI_PKT_IN_DONE0_CNTS */
[all …]
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| /openbmc/u-boot/lib/ |
| H A D | div64.c | 9 * Generic C version of 64bit/32bit division and modulo, with
10 * 64bit result and 32bit remainder.
24 /* Not needed on 64bit architectures */
35 /* Reduce the thing a bit first */ in __div64_32()
84 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
85 * @dividend: 64bit dividend
86 * @divisor: 64bit divisor
87 * @remainder: 64bit remainder
91 * is kept distinct to avoid slowing down the div64_u64 operation on 32bit
124 * div64_u64 - unsigned 64bit divide with 64bit divisor
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| /openbmc/linux/arch/x86/um/ |
| H A D | Kconfig | 14 config 64BIT config
15 bool "64-bit kernel" if "$(SUBARCH)" = "x86"
19 def_bool !64BIT
28 def_bool 64BIT
32 bool "Three-level pagetables" if !64BIT
33 default 64BIT
39 However, this it experimental on 32-bit architectures, so if unsure say
40 N (on x86-64 it's automatically enabled, instead, as it's safe there).
43 def_bool !64BIT
46 def_bool !64BIT
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| /openbmc/linux/arch/riscv/ |
| H A D | Kconfig | 7 config 64BIT config
10 config 32BIT
58 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
71 select GENERIC_ATOMIC64 if !64BIT
88 select GENERIC_TIME_VSYSCALL if MMU && 64BIT
94 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT && !XIP_KERNEL
97 select HAVE_ARCH_KASAN if MMU && 64BIT
98 select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT
99 select HAVE_ARCH_KFENCE if MMU && 64BIT
107 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU
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| /openbmc/u-boot/include/linux/ |
| H A D | math64.h | 8 #if BITS_PER_LONG == 64
14 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
16 * This is commonly provided by 32bit archs to provide an optimized 64bit
26 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
35 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
44 * div64_u64 - unsigned 64bit divide with 64bit divisor
52 * div64_s64 - signed 64bit divide with 64bit divisor
91 * div_u64 - unsigned 64bit divide with 32bit divisor
93 * This is the most common 64bit divide and should be used if possible,
94 * as many 32bit archs can optimize this variant better than a full 64bit
[all …]
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| /openbmc/linux/drivers/gpio/ |
| H A D | gpio-xilinx.c | 31 #define XGPIO_GIER_IE BIT(31)
64 DECLARE_BITMAP(hw_map, 64);
65 DECLARE_BITMAP(sw_map, 64);
66 DECLARE_BITMAP(state, 64);
67 DECLARE_BITMAP(last_irq_read, 64);
68 DECLARE_BITMAP(dir, 64);
71 DECLARE_BITMAP(enable, 64);
72 DECLARE_BITMAP(rising_edge, 64);
73 DECLARE_BITMAP(falling_edge, 64);
77 static inline int xgpio_from_bit(struct xgpio_instance *chip, int bit) in xgpio_from_bit() argument
[all …]
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| /openbmc/linux/arch/s390/include/asm/ |
| H A D | elf.h | 13 #define R_390_8 1 /* Direct 8 bit. */
14 #define R_390_12 2 /* Direct 12 bit. */
15 #define R_390_16 3 /* Direct 16 bit. */
16 #define R_390_32 4 /* Direct 32 bit. */
17 #define R_390_PC32 5 /* PC relative 32 bit. */
18 #define R_390_GOT12 6 /* 12 bit GOT offset. */
19 #define R_390_GOT32 7 /* 32 bit GOT offset. */
20 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
25 #define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
26 #define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */
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| /openbmc/linux/drivers/net/ethernet/broadcom/ |
| H A D | tg3.h | 21 #define TG3_BDINFO_HOST_ADDR 0x0UL /* 64-bit */
22 #define TG3_BDINFO_MAXLEN_FLAGS 0x8UL /* 32-bit */
27 #define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */
285 #define TG3PCI_STD_RING_PROD_IDX 0x00000098 /* 64-bit */
286 #define TG3PCI_RCV_RET_RING_CON_IDX 0x000000a0 /* 64-bit */
307 #define MAILBOX_INTERRUPT_0 0x00000200 /* 64-bit */
308 #define MAILBOX_INTERRUPT_1 0x00000208 /* 64-bit */
309 #define MAILBOX_INTERRUPT_2 0x00000210 /* 64-bit */
310 #define MAILBOX_INTERRUPT_3 0x00000218 /* 64-bit */
311 #define MAILBOX_GENERAL_0 0x00000220 /* 64-bit */
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| /openbmc/linux/drivers/acpi/acpica/ |
| H A D | tbfadt.c | 166 * Bit width field in the GAS is only one byte long, 255 max. in acpi_tb_init_generic_address()
178 "%s - 32-bit FADT register is too long (%u bytes, %u bits) " in acpi_tb_init_generic_address()
188 * The 64-bit Address field is non-aligned in the byte packed in acpi_tb_init_generic_address()
206 * address32 - 32-bit address of the register
207 * address64 - 64-bit address of the register
209 * RETURN: The resolved 64-bit address
211 * DESCRIPTION: Select between 32-bit and 64-bit versions of addresses within
217 * the 32-bit and 64-bit address fields (FIRMWARE_CTRL/X_FIRMWARE_CTRL and
222 * By default, as per the ACPICA specification, a valid 64-bit address is
223 * used regardless of the value of the 32-bit address. However, this
[all …]
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| /openbmc/u-boot/arch/sandbox/ |
| H A D | Kconfig | 14 bool "Use 64-bit addresses"
27 prompt "Run sandbox on 32/64-bit host"
30 Sandbox can be built on 32-bit and 64-bit hosts.
31 The default is to build on a 64-bit host and run
32 on a 64-bit host. If you want to run sandbox on
33 a 32-bit host, change it here.
36 bool "32-bit host"
40 bool "64-bit host"
47 default 64 if HOST_64BIT
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| /openbmc/qemu/docs/devel/ |
| H A D | tcg-ops.rst | 109 A 32-bit integer.
113 A 64-bit integer. For 32-bit hosts, such variables are split into a pair
131 A 128-bit integer. For all hosts, such variables are split into a number
138 A 64-bit vector. This type is valid only if the TCG target
143 A 128-bit vector. This type is valid only if the TCG target
148 A 256-bit vector. This type is valid only if the TCG target
226 | *<ret>* optional 32 bit or 64 bit return value
227 | *<params>* optional 32 bit or 64 bit parameters
366 | Unspecified behavior if *t2* < 0 or *t2* >= 32 (resp 64)
371 | Unspecified behavior if *t2* < 0 or *t2* >= 32 (resp 64)
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| /openbmc/linux/drivers/net/can/flexcan/ |
| H A D | flexcan.h | 25 * MX25 FlexCAN2 03.00.00.00 no no no no no no 64
26 * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64
27 * MX35 FlexCAN2 03.00.00.00 no no no no no no 64
28 * MX53 FlexCAN2 03.00.00.00 yes no no no no no 64
29 * MX6s FlexCAN3 10.00.12.00 yes yes no no yes no 64
30 * MX8QM FlexCAN3 03.00.23.00 yes yes no no yes yes 64
31 * MX8MP FlexCAN3 03.00.17.01 yes yes no yes yes yes 64
32 * VF610 FlexCAN3 ? no yes no yes yes? no 64
33 * LS1021A FlexCAN2 03.00.04.00 no yes no no yes no 64
34 * LX2160A FlexCAN3 03.00.23.00 no yes no yes yes yes 64
[all …]
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| /openbmc/qemu/target/s390x/tcg/ |
| H A D | fpu_helper.c | 77 * - The mask bit in the FPC is zero and the result is inexact in handle_exceptions()
78 * - The mask bit in the FPC is one in handle_exceptions()
80 * underflow action in case the mask bit is not one. in handle_exceptions()
214 /* XxC is bit 1 of m4 */ in xxc_from_m34()
218 /* 32-bit FP addition */
226 /* 64-bit FP addition */
234 /* 128-bit FP addition */
242 /* 32-bit FP subtraction */
250 /* 64-bit FP subtraction */
258 /* 128-bit FP subtraction */
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| /openbmc/linux/include/xen/interface/ |
| H A D | callback.h | 28 /* x86/64 hypervisor: Syscall by 64-bit guest app ('64-on-64-on-64'). */
42 * - 32-bit hypervisor: with the supervisor_mode_kernel feature enabled
43 * - 64-bit hypervisor: 32-bit guest applications on Intel CPUs
44 * ('32-on-32-on-64', '32-on-64-on-64')
45 * [nb. also 64-bit guest applications on Intel CPUs
46 * ('64-on-64-on-64'), but syscall is preferred]
51 * x86/64 hypervisor: Syscall by 32-bit guest app on AMD CPUs
52 * ('32-on-32-on-64', '32-on-64-on-64')
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| /openbmc/linux/arch/x86/kvm/vmx/ |
| H A D | vmx_ops.h | 23 * for 64-bit targets. Preserving all registers allows the VMREAD inline asm
29 * 64-bit targets.
46 "16-bit accessor invalid for 64-bit field"); in vmcs_check16()
48 "16-bit accessor invalid for 64-bit high field"); in vmcs_check16()
50 "16-bit accessor invalid for 32-bit high field"); in vmcs_check16()
52 "16-bit accessor invalid for natural width field"); in vmcs_check16()
58 "32-bit accessor invalid for 16-bit field"); in vmcs_check32()
60 "32-bit accessor invalid for 64-bit field"); in vmcs_check32()
62 "32-bit accessor invalid for 64-bit high field"); in vmcs_check32()
64 "32-bit accessor invalid for natural width field"); in vmcs_check32()
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| /openbmc/u-boot/arch/mips/ |
| H A D | config.mk | 7 32bit-emul := elf32btsmip
8 64bit-emul := elf64btsmip
9 32bit-bfd := elf32-tradbigmips
10 64bit-bfd := elf64-tradbigmips
16 32bit-emul := elf32ltsmip
17 64bit-emul := elf64ltsmip
18 32bit-bfd := elf32-tradlittlemips
19 64bit-bfd := elf64-tradlittlemips
26 PLATFORM_LDFLAGS += -m $(32bit-emul)
27 OBJCOPYFLAGS += -O $(32bit-bfd)
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| /openbmc/qemu/include/qemu/ |
| H A D | bitops.h | 24 #define BIT(nr) (1UL << (nr)) macro
28 (((~0ULL) >> (64 - (length))) << (shift))
43 * be some guest-visible register view of the bit array.
56 * DOC: 'unsigned long' bit array APIs
63 * set_bit - Set a bit in memory
64 * @nr: the bit to set
76 * set_bit_atomic - Set a bit in memory atomically
77 * @nr: the bit to set
89 * clear_bit - Clears a bit in memory
90 * @nr: Bit to clear
[all …]
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