Home
last modified time | relevance | path

Searched +full:64 +full:- +full:bit (Results 1 – 25 of 1077) sorted by relevance

12345678910>>...44

/openbmc/linux/include/linux/
H A Dmath64.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #if BITS_PER_LONG == 64
16 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
17 * @dividend: unsigned 64bit dividend
18 * @divisor: unsigned 32bit divisor
19 * @remainder: pointer to unsigned 32bit remainder
23 * This is commonly provided by 32bit archs to provide an optimized 64bit
33 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
34 * @dividend: signed 64bit dividend
35 * @divisor: signed 32bit divisor
[all …]
H A Dexportfs.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 * 32bit inode number, 32 bit generation number.
38 * 32bit inode number, 32 bit generation number,
39 * 32 bit parent directory inode number.
44 * 64 bit object ID, 64 bit root object ID,
45 * 32 bit generation number.
50 * 64 bit object ID, 64 bit root object ID,
51 * 32 bit generation number,
52 * 64 bit parent object ID, 32 bit parent generation.
57 * 64 bit object ID, 64 bit root object ID,
[all …]
/openbmc/linux/drivers/mtd/nand/raw/
H A Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNQGAMA 64G 3.3V 8-bit",
50 {"SDTNRGAMA 64G 3.3V 8-bit",
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_ids.c28 LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS),
29 LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS),
30 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS),
31 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS),
32 LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS),
33 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS),
35 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS),
42 {"TC58NVG0S3E 1G 3.3V 8-bit",
44 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512),
46 {"TC58NVG2S0F 4G 3.3V 8-bit",
[all …]
/openbmc/openbmc/poky/meta/classes-recipe/
H A Dsiteinfo.bbclass4 # SPDX-License-Identifier: MIT
13 # where 'target' == "<arch>-<os>"
16 # * target: Returns the target name ("<arch>-<os>")
18 # * bits: Returns the bit size of the target, either "32" or "64"
26 …"allarch": "endian-little bit-32", # bogus, but better than special-casing the checks below for al…
27 "aarch64": "endian-little bit-64 arm-common arm-64",
28 "aarch64_be": "endian-big bit-64 arm-common arm-64",
29 "arc": "endian-little bit-32 arc-common",
30 "arceb": "endian-big bit-32 arc-common",
31 "arm": "endian-little bit-32 arm-common arm-32",
[all …]
/openbmc/linux/arch/x86/crypto/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 depends on X86 && 64BIT
14 - ADX (large integer arithmetic)
17 tristate "Ciphers: AES, modes: ECB, CBC, CTS, CTR, XTR, XTS, GCM (AES-NI)"
27 Length-preserving ciphers: AES with ECB, CBC, CTS, CTR, XTR, XTS
29 Architecture: x86 (32-bit and 64-bit) using:
30 - AES-NI (AES new instructions)
34 depends on X86 && 64BIT
40 Length-preserving ciphers: Blowfish with ECB and CBC modes
46 depends on X86 && 64BIT
[all …]
/openbmc/linux/lib/
H A Datomic64_test.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #define TEST(bit, op, c_op, val) \ argument
22 atomic##bit##_set(&v, v0); \
24 atomic##bit##_##op(val, &v); \
26 WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
27 (unsigned long long)atomic##bit##_read(&v), \
33 * @test should be a macro accepting parameters (bit, op, ...)
36 #define FAMILY_TEST(test, bit, op, args...) \ argument
38 test(bit, op, ##args); \
39 test(bit, op##_acquire, ##args); \
[all …]
/openbmc/linux/arch/parisc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
17 select ARCH_SPLIT_ARG64 if !64BIT
37 select GENERIC_ATOMIC64 if !64BIT
79 select HAVE_DYNAMIC_FTRACE if $(cc-option,-fpatchable-function-entry=1,1)
86 select HAVE_FUNCTION_DESCRIPTORS if 64BIT
90 The PA-RISC microprocessor is designed by Hewlett-Packard and used
92 and later HP3000 series). The PA-RISC Linux project home page is
120 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
139 default 18 if 64BIT
[all …]
/openbmc/linux/drivers/net/ethernet/cavium/liquidio/
H A Dcn23xx_pf_regs.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
74 /* 2 scatch registers (64-bit) */
80 /* 1 registers (64-bit) - SLI_CTL_STATUS */
83 /* SLI Packet Input Jabber Register (64 bit register)
117 /* 4 registers (64-bit) for mapping IOQs to MACs(PEMs)-
122 /*1 register (64-bit) to determine whether IOQs are in reset. */
125 /* Each Input Queue register is at a 16-byte Offset in BAR0 */
141 /* Starting bit of the TRS field in CN23XX_SLI_PKT_MAC_RINFO64 register */
143 /* Starting bit of SRN field in CN23XX_SLI_PKT_MAC_RINFO64 register */
[all …]
/openbmc/u-boot/lib/
H A Ddiv64.c4 * Based on former do_div() implementation from asm-parisc/div64.h:
5 * Copyright (C) 1999 Hewlett-Packard Co
6 * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
9 * Generic C version of 64bit/32bit division and modulo, with
10 * 64bit result and 32bit remainder.
15 * for some CPUs. __div64_32() can be overridden by linking arch-specific
24 /* Not needed on 64bit architectures */
35 /* Reduce the thing a bit first */ in __div64_32()
40 rem -= (uint64_t) (high*base) << 32; in __div64_32()
50 rem -= b; in __div64_32()
[all …]
/openbmc/linux/arch/riscv/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
7 config 64BIT config
10 config 32BIT
58 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
71 select GENERIC_ATOMIC64 if !64BIT
88 select GENERIC_TIME_VSYSCALL if MMU && 64BIT
94 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT && !XIP_KERNEL
97 select HAVE_ARCH_KASAN if MMU && 64BIT
98 select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT
[all …]
/openbmc/linux/arch/x86/um/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
14 config 64BIT config
15 bool "64-bit kernel" if "$(SUBARCH)" = "x86"
19 def_bool !64BIT
28 def_bool 64BIT
32 bool "Three-level pagetables" if !64BIT
33 default 64BIT
35 Three-level pagetables will let UML have more than 4G of physical
39 However, this it experimental on 32-bit architectures, so if unsure say
40 N (on x86-64 it's automatically enabled, instead, as it's safe there).
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-xilinx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2008 - 2013 Xilinx, Inc.
31 #define XGPIO_GIER_IE BIT(31)
45 * struct xgpio_instance - Stores information about GPIO device
64 DECLARE_BITMAP(hw_map, 64);
65 DECLARE_BITMAP(sw_map, 64);
66 DECLARE_BITMAP(state, 64);
67 DECLARE_BITMAP(last_irq_read, 64);
68 DECLARE_BITMAP(dir, 64);
71 DECLARE_BITMAP(enable, 64);
[all …]
/openbmc/u-boot/include/linux/
H A Dmath64.h8 #if BITS_PER_LONG == 64
14 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
16 * This is commonly provided by 32bit archs to provide an optimized 64bit
26 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
35 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
44 * div64_u64 - unsigned 64bit divide with 64bit divisor
52 * div64_s64 - signed 64bit divide with 64bit divisor
91 * div_u64 - unsigned 64bit divide with 32bit divisor
93 * This is the most common 64bit divide and should be used if possible,
94 * as many 32bit archs can optimize this variant better than a full 64bit
[all …]
/openbmc/linux/arch/s390/include/asm/
H A Delf.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Derived from "include/asm-i386/elf.h"
13 #define R_390_8 1 /* Direct 8 bit. */
14 #define R_390_12 2 /* Direct 12 bit. */
15 #define R_390_16 3 /* Direct 16 bit. */
16 #define R_390_32 4 /* Direct 32 bit. */
17 #define R_390_PC32 5 /* PC relative 32 bit. */
18 #define R_390_GOT12 6 /* 12 bit GOT offset. */
19 #define R_390_GOT32 7 /* 32 bit GOT offset. */
20 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
[all …]
/openbmc/linux/drivers/net/ethernet/broadcom/
H A Dtg3.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Copyright (C) 2007-2016 Broadcom Corporation.
9 * Copyright (C) 2016-2017 Broadcom Limited.
21 #define TG3_BDINFO_HOST_ADDR 0x0UL /* 64-bit */
22 #define TG3_BDINFO_MAXLEN_FLAGS 0x8UL /* 32-bit */
27 #define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */
78 /* 0x04 --> 0x2c unused */
115 /* 0x30 --> 0x64 unused */
117 /* 0x66 --> 0x68 unused */
284 /* 0x94 --> 0x98 unused */
[all …]
/openbmc/linux/drivers/acpi/acpica/
H A Dtbfadt.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: tbfadt - FADT table utilities
6 * Copyright (C) 2000 - 2023, Intel Corp.
143 * PARAMETERS: generic_address - GAS struct to be initialized
144 * space_id - ACPI Space ID for this register
145 * byte_width - Width of this register
146 * address - Address of the register
147 * register_name - ASCII name of the ACPI register
166 * Bit width field in the GAS is only one byte long, 255 max. in acpi_tb_init_generic_address()
178 "%s - 32-bit FADT register is too long (%u bytes, %u bits) " in acpi_tb_init_generic_address()
[all …]
/openbmc/u-boot/arch/sandbox/
H A DKconfig14 bool "Use 64-bit addresses"
27 prompt "Run sandbox on 32/64-bit host"
30 Sandbox can be built on 32-bit and 64-bit hosts.
31 The default is to build on a 64-bit host and run
32 on a 64-bit host. If you want to run sandbox on
33 a 32-bit host, change it here.
36 bool "32-bit host"
40 bool "64-bit host"
47 default 64 if HOST_64BIT
/openbmc/qemu/docs/devel/
H A Dtcg-ops.rst1 .. _tcg-ops-ref:
43 a sequence of basic blocks connected by the fall-through paths of
60 .. code-block:: none
62 add_i32 t0, t1, t2 /* (t0 <- t1 + t2) */
109 A 32-bit integer.
113 A 64-bit integer. For 32-bit hosts, such variables are split into a pair
116 host-endian representation.
131 A 128-bit integer. For all hosts, such variables are split into a number
134 host-endian representation.
138 A 64-bit vector. This type is valid only if the TCG target
[all …]
/openbmc/qemu/target/s390x/tcg/
H A Dfpu_helper.c23 #include "s390x-internal.h"
25 #include "exec/exec-all.h"
26 #include "exec/helper-proto.h"
67 qemu_exc = env->fpu_status.float_exception_flags; in handle_exceptions()
71 env->fpu_status.float_exception_flags = 0; in handle_exceptions()
75 * IEEE-Underflow exception recognition exists if a tininess condition in handle_exceptions()
77 * - The mask bit in the FPC is zero and the result is inexact in handle_exceptions()
78 * - The mask bit in the FPC is one in handle_exceptions()
80 * underflow action in case the mask bit is not one. in handle_exceptions()
83 !((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) { in handle_exceptions()
[all …]
/openbmc/linux/drivers/net/can/flexcan/
H A Dflexcan.h1 /* SPDX-License-Identifier: GPL-2.0
2 * flexcan.c - FLEXCAN CAN controller driver
4 * Copyright (c) 2005-2006 Varma Electronics Oy
6 * Copyright (c) 2010-2017 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de>
10 * Based on code originally by Andrey Volkov <avolkov@varma-el.com>
17 #include <linux/can/rx-offload.h>
22 * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB
25 * MX25 FlexCAN2 03.00.00.00 no no no no no no 64
26 * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64
27 * MX35 FlexCAN2 03.00.00.00 no no no no no no 64
[all …]
/openbmc/linux/include/xen/interface/
H A Dcallback.h1 /* SPDX-License-Identifier: MIT */
19 * @extra_args == Operation-specific extra arguments (NULL if none).
28 /* x86/64 hypervisor: Syscall by 64-bit guest app ('64-on-64-on-64'). */
42 * - 32-bit hypervisor: with the supervisor_mode_kernel feature enabled
43 * - 64-bit hypervisor: 32-bit guest applications on Intel CPUs
44 * ('32-on-32-on-64', '32-on-64-on-64')
45 * [nb. also 64-bit guest applications on Intel CPUs
46 * ('64-on-64-on-64'), but syscall is preferred]
51 * x86/64 hypervisor: Syscall by 32-bit guest app on AMD CPUs
52 * ('32-on-32-on-64', '32-on-64-on-64')
[all …]
/openbmc/linux/arch/x86/kvm/vmx/
H A Dvmx_ops.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 * for 64-bit targets. Preserving all registers allows the VMREAD inline asm
29 * 64-bit targets.
37 * exists primarily to enable instrumentation for the VM-Fail path.
46 "16-bit accessor invalid for 64-bit field"); in vmcs_check16()
48 "16-bit accessor invalid for 64-bit high field"); in vmcs_check16()
50 "16-bit accessor invalid for 32-bit high field"); in vmcs_check16()
52 "16-bit accessor invalid for natural width field"); in vmcs_check16()
58 "32-bit accessor invalid for 16-bit field"); in vmcs_check32()
60 "32-bit accessor invalid for 64-bit field"); in vmcs_check32()
[all …]
/openbmc/qemu/include/qemu/
H A Dbitops.h9 * See the COPYING.LIB file in the top-level directory.
16 #include "host-utils.h"
24 #define BIT(nr) (1UL << (nr)) macro
28 (((~0ULL) >> (64 - (length))) << (shift))
33 * We provide a set of functions which work on arbitrary-length arrays of
37 * - Bits stored in an array of 'unsigned long': set_bit(), clear_bit(), etc
38 * - Bits stored in an array of 'uint32_t': set_bit32(), clear_bit32(), etc
43 * be some guest-visible register view of the bit array.
56 * DOC: 'unsigned long' bit array APIs
63 * set_bit - Set a bit in memory
[all …]
/openbmc/u-boot/arch/mips/
H A Dconfig.mk1 # SPDX-License-Identifier: GPL-2.0+
7 32bit-emul := elf32btsmip
8 64bit-emul := elf64btsmip
9 32bit-bfd := elf32-tradbigmips
10 64bit-bfd := elf64-tradbigmips
11 PLATFORM_CPPFLAGS += -EB
12 PLATFORM_LDFLAGS += -EB
16 32bit-emul := elf32ltsmip
17 64bit-emul := elf64ltsmip
18 32bit-bfd := elf32-tradlittlemips
[all …]

12345678910>>...44