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/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_ids.c28 LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS),
29 LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS),
30 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS),
31 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS),
32 LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS),
33 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS),
35 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS),
42 {"TC58NVG0S3E 1G 3.3V 8-bit",
44 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512),
46 {"TC58NVG2S0F 4G 3.3V 8-bit",
[all …]
/openbmc/openbmc/poky/meta/classes-recipe/
H A Dsiteinfo.bbclass4 # SPDX-License-Identifier: MIT
13 # where 'target' == "<arch>-<os>"
16 # * target: Returns the target name ("<arch>-<os>")
18 # * bits: Returns the bit size of the target, either "32" or "64"
26 …"allarch": "endian-little bit-32", # bogus, but better than special-casing the checks below for al…
27 "aarch64": "endian-little bit-64 arm-common arm-64",
28 "aarch64_be": "endian-big bit-64 arm-common arm-64",
29 "arc": "endian-little bit-32 arc-common",
30 "arceb": "endian-big bit-32 arc-common",
31 "arm": "endian-little bit-32 arm-common arm-32",
[all …]
/openbmc/u-boot/arch/sandbox/
H A DKconfig14 bool "Use 64-bit addresses"
27 prompt "Run sandbox on 32/64-bit host"
30 Sandbox can be built on 32-bit and 64-bit hosts.
31 The default is to build on a 64-bit host and run
32 on a 64-bit host. If you want to run sandbox on
33 a 32-bit host, change it here.
36 bool "32-bit host"
40 bool "64-bit host"
47 default 64 if HOST_64BIT
/openbmc/u-boot/lib/
H A Ddiv64.c4 * Based on former do_div() implementation from asm-parisc/div64.h:
5 * Copyright (C) 1999 Hewlett-Packard Co
6 * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
9 * Generic C version of 64bit/32bit division and modulo, with
10 * 64bit result and 32bit remainder.
15 * for some CPUs. __div64_32() can be overridden by linking arch-specific
24 /* Not needed on 64bit architectures */
35 /* Reduce the thing a bit first */ in __div64_32()
40 rem -= (uint64_t) (high*base) << 32; in __div64_32()
50 rem -= b; in __div64_32()
[all …]
/openbmc/u-boot/include/linux/
H A Dmath64.h8 #if BITS_PER_LONG == 64
14 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
16 * This is commonly provided by 32bit archs to provide an optimized 64bit
26 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
35 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
44 * div64_u64 - unsigned 64bit divide with 64bit divisor
52 * div64_s64 - signed 64bit divide with 64bit divisor
91 * div_u64 - unsigned 64bit divide with 32bit divisor
93 * This is the most common 64bit divide and should be used if possible,
94 * as many 32bit archs can optimize this variant better than a full 64bit
[all …]
/openbmc/u-boot/arch/mips/
H A Dconfig.mk1 # SPDX-License-Identifier: GPL-2.0+
7 32bit-emul := elf32btsmip
8 64bit-emul := elf64btsmip
9 32bit-bfd := elf32-tradbigmips
10 64bit-bfd := elf64-tradbigmips
11 PLATFORM_CPPFLAGS += -EB
12 PLATFORM_LDFLAGS += -EB
16 32bit-emul := elf32ltsmip
17 64bit-emul := elf64ltsmip
18 32bit-bfd := elf32-tradlittlemips
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/glog/
H A Dglog_0.7.1.bb1 DESCRIPTION = "The glog library implements application-level logging. This \
2 library provides logging APIs based on C++-style streams and various helper \
6 LICENSE = "BSD-3-Clause"
19 PACKAGECONFIG ?= "shared unwind 64bit-atomics"
21 PACKAGECONFIG:remove:riscv32 = "unwind 64bit-atomics"
22 PACKAGECONFIG:remove:mipsarch = "64bit-atomics"
23 PACKAGECONFIG:remove:armv5 = "64bit-atomics"
24 PACKAGECONFIG:remove:armv6 = "64bit-atomics"
25 PACKAGECONFIG:remove:powerpc = "64bit-atomics"
27 PACKAGECONFIG:append:libc-musl:riscv64 = " execinfo"
[all …]
/openbmc/qemu/configs/targets/
H A Driscv64-linux-user.mak4 TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.x…
7 TARGET_SYSTBL_ABI=64
8 TARGET_SYSTBL_ABI=common,64,riscv,rlimit,memfd_secret
10 TARGET_LONG_BITS=64
H A Driscv64-softmmu.mak4 …-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64b…
7 TARGET_LONG_BITS=64
H A Driscv64-bsd-user.mak4 TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.x…
5 TARGET_LONG_BITS=64
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-protocols/net-snmp/net-snmp/
H A D0011-ac_add_search_path.m4-keep-consistent-between-32bit-.patch4 Subject: [PATCH] ac_add_search_path.m4: keep consistent between 32bit and
5 64bit
7 With configure option "--with-openssl=${STAGING_EXECPREFIXDIR}", it behaves
8 differently between 32bit and 64bit system as the openssl lib resides under
9 /build/tmp/work/corei7-64-wrs-linux/net-snmp/5.9-r0/recipe-sysroot/usr/lib64
10 for 64bit system, but resides under [1] for 32bit system.
12 So add the patch to fix the gap between 32bit and 64bit system.
14 [1] /build/tmp/work/corei7-64-wrs-linux/net-snmp/5.9-r0/recipe-sysroot/usr/lib
16 Upstream-Status: Inappropriate [configuration specific]
18 Signed-off-by: Mingli Yu <mingli.yu@windriver.com>
[all …]
/openbmc/qemu/target/s390x/tcg/
H A Dfpu_helper.c23 #include "s390x-internal.h"
25 #include "exec/helper-proto.h"
66 qemu_exc = env->fpu_status.float_exception_flags; in handle_exceptions()
70 env->fpu_status.float_exception_flags = 0; in handle_exceptions()
74 * IEEE-Underflow exception recognition exists if a tininess condition in handle_exceptions()
76 * - The mask bit in the FPC is zero and the result is inexact in handle_exceptions()
77 * - The mask bit in the FPC is one in handle_exceptions()
79 * underflow action in case the mask bit is not one. in handle_exceptions()
82 !((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) { in handle_exceptions()
93 * triggering the trap - impossible right now. in handle_exceptions()
[all …]
/openbmc/qemu/include/qemu/
H A Dbitops.h9 * See the COPYING.LIB file in the top-level directory.
16 #include "host-utils.h"
24 #define BIT(nr) (1UL << (nr)) macro
28 (((~0ULL) >> (64 - (length))) << (shift))
33 * We provide a set of functions which work on arbitrary-length arrays of
37 * - Bits stored in an array of 'unsigned long': set_bit(), clear_bit(), etc
38 * - Bits stored in an array of 'uint32_t': set_bit32(), clear_bit32(), etc
43 * be some guest-visible register view of the bit array.
56 * DOC: 'unsigned long' bit array APIs
63 * set_bit - Set a bit in memory
[all …]
H A Dhost-utils.h27 * version 2 or later. See the COPYING file in the top-level directory.
42 *phigh = r >> 64; in mulu64()
50 *phigh = r >> 64; in muls64()
53 /* compute with 96 bit intermediate result: (a*b)/c */
61 return ((__int128_t)a * b + c - 1) / c; in muldiv64_round_up()
67 __uint128_t dividend = ((__uint128_t)*phigh << 64) | *plow; in divu128()
71 *phigh = result >> 64; in divu128()
78 __int128_t dividend = ((__int128_t)*phigh << 64) | *plow; in divs128()
82 *phigh = result >> 64; in divs128()
109 rl += c - 1; in muldiv64_rounding()
[all …]
/openbmc/openbmc/poky/documentation/dev-manual/
H A Dx32-psabi.rst1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
6 x32 processor-specific Application Binary Interface (`x32
7 psABI <https://software.intel.com/en-us/node/628948>`__) is a native
8 32-bit processor-specific ABI for Intel 64 (x86-64) architectures. An
13 Some processing environments prefer using 32-bit applications even when
14 running on Intel 64-bit platforms. Consider the i386 psABI, which is a
15 very old 32-bit ABI for Intel 64-bit platforms. The i386 psABI does not
16 provide efficient use and access of the Intel 64-bit processor
18 psABI. This ABI is newer and uses 64-bits for data sizes and program
29 - You can create packages and images in x32 psABI format on x86_64
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D28734 # This tests qocw2-specific low-level functionality
47 rm -f "$RAND_FILE"
55 output=$(_make_test_img -o 'compression_type=zstd' 64M; _cleanup_test_img)
56 if echo "$output" | grep -q "Parameter 'compression-type' does not accept value 'zstd'"; then
61 echo "=== Testing compression type incompatible bit setting for zlib ==="
63 _make_test_img -o compression_type=zlib 64M
64 _qcow2_dump_header --no-filter-compression | grep incompatible_features
67 echo "=== Testing compression type incompatible bit setting for zstd ==="
69 _make_test_img -o compression_type=zstd 64M
70 _qcow2_dump_header --no-filter-compression | grep incompatible_features
[all …]
/openbmc/openbmc/poky/meta/recipes-core/glibc/ldconfig-native-2.12.1/
H A Dadd-64-bit-flag-for-ELF64-entries.patch4 Subject: [PATCH] Add 64-bit flag for ELF64 entries.
6 ldconfig-native was grepped from an old version of glibc, and its output
7 lacks neccessary 64bit flag in entries.
9 detect any library due to the old file format that ldconfig-native
10 creates. This fix sets architecture-dependent 64bit flags for 64-bit ELF.
12 Upstream-Status: Inappropriate [embedded specific]
14 Signed-off-by: Yuanjie Huang <yuanjie.huang@windriver.com>
15 ---
21 diff --git a/cache.c b/cache.c
23 --- a/cache.c
[all …]
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
30 - Cryptography acceleration (SEC)
[all …]
/openbmc/openbmc/poky/meta/conf/machine/include/microblaze/
H A Darch-microblaze.inc7 # 64-bit
8 TUNEVALID[64-bit] = "64-bit MicroBlaze"
9 TUNECONFLICTS[64-bit] = "v8.00 v8.10 v8.20 v8.30 v8.40 v8.50 v9.0 v9.1 v9.2 v9.3 v9.4 v9.5 v9.6 v10…
10 MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "64-bit", "microblaze64:", "", d)}"
18 TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "bigendian", " -mbig-endian", " -mlittle-endi…
21 TUNEVALID[barrel-shift] = "Enable Hardware Barrel Shifter"
22 TUNEVALID[pattern-compare] = "Enable Pattern Compare Instructions"
27 TUNEVALID[frequency-optimized] = "Enabling tuning for frequency optimized core (AREA_OPTIMIZED_2)"
28 TUNECONFLICTS[frequency-optimized] = "v8.00 v8.10 v8.20 v8.30 v8.40 v8.50 v9.0 v9.1 v9.2 v9.3 v9.4 …
31 …GS .= "${@bb.utils.contains("TUNE_FEATURES", "barrel-shift", " -mxl-barrel-shift", " -mno-xl-barre…
[all …]
/openbmc/u-boot/tools/binman/etype/
H A Dx86_start16_spl.py1 # SPDX-License-Identifier: GPL-2.0+
5 # Entry-type module for the 16-bit x86 start-up code for U-Boot SPL
12 """x86 16-bit start-up code for SPL
15 - filename: Filename of spl/u-boot-x86-16bit-spl.bin (default
16 'spl/u-boot-x86-16bit-spl.bin')
18 x86 CPUs start up in 16-bit mode, even if they are 64-bit CPUs. This code
21 for changing to 32-bit mode and starting SPL, which in turn changes to
22 64-bit mode and jumps to U-Boot (for 64-bit U-Boot).
24 For 32-bit U-Boot, the 'x86_start16' entry type is used instead.
30 return 'spl/u-boot-x86-16bit-spl.bin'
/openbmc/u-boot/lib/efi/
H A DKconfig2 bool "Support running U-Boot from EFI"
5 U-Boot can be started from EFI on certain platforms. This allows
6 EFI to perform most of the system init and then jump to U-Boot for
7 final system boot. Another option is to run U-Boot as an EFI
8 application, with U-Boot using EFI's drivers instead of its own.
17 Build U-Boot as an application which can be started from EFI. This
19 U-Boot to it. It allows only very basic functionality, such as a
29 hex "Amount of EFI RAM for U-Boot"
33 Set the amount of EFI RAM which is claimed by U-Boot for its own
34 use. U-Boot allocates this from EFI on start-up (along with a few
[all …]
/openbmc/qemu/docs/devel/
H A Dtcg-ops.rst1 .. _tcg-ops-ref:
43 a sequence of basic blocks connected by the fall-through paths of
60 .. code-block:: none
62 add_i32 t0, t1, t2 /* (t0 <- t1 + t2) */
109 A 32-bit integer.
113 A 64-bit integer. For 32-bit hosts, such variables are split into a pair
116 host-endian representation.
131 A 128-bit integer. For all hosts, such variables are split into a number
134 host-endian representation.
138 A 64-bit vector. This type is valid only if the TCG target
[all …]
/openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/
H A Dpch.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * Copyright (C) 2008-2009 coresystems GmbH
136 #define VCH 0x0000 /* 32bit */
137 #define VCAP1 0x0004 /* 32bit */
138 #define VCAP2 0x0008 /* 32bit */
139 #define PVC 0x000c /* 16bit */
140 #define PVS 0x000e /* 16bit */
142 #define V0CAP 0x0010 /* 32bit */
143 #define V0CTL 0x0014 /* 32bit */
144 #define V0STS 0x001a /* 16bit */
[all …]
/openbmc/qemu/docs/system/arm/
H A Dvirt.rst1 .. _arm-virt:
10 idiosyncrasies and limitations of a particular bit of real-world
18 ``virt-5.0`` machine type will behave like the ``virt`` machine from
19 the QEMU 5.0 release, and migration should work between ``virt-5.0``
20 of the 5.0 release and ``virt-5.0`` of the 5.1 release. Migration
22 the non-versioned ``virt`` machine type.
24 VM migration is not guaranteed when using ``-cpu max``, as features
33 - PCI/PCIe devices
34 - CXL Fixed memory windows, root bridges and devices.
35 - Flash memory
[all …]
/openbmc/u-boot/include/asm-generic/bitops/
H A Dfls64.h7 * fls64 - find last set bit in a 64-bit word
11 * ffsll, but returns the position of the most significant set bit.
14 * set bit if value is nonzero. The last (most significant) bit is
15 * at position 64.
25 #elif BITS_PER_LONG == 64
33 #error BITS_PER_LONG not 32 or 64

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