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/openbmc/linux/drivers/clk/xilinx/
H A Dxlnx_vcu.c99 { 25, 3, 10, 3, 63, 1000 },
100 { 26, 3, 10, 3, 63, 1000 },
101 { 27, 4, 6, 3, 63, 1000 },
102 { 28, 4, 6, 3, 63, 1000 },
103 { 29, 4, 6, 3, 63, 1000 },
104 { 30, 4, 6, 3, 63, 1000 },
105 { 31, 6, 1, 3, 63, 1000 },
106 { 32, 6, 1, 3, 63, 1000 },
107 { 33, 4, 10, 3, 63, 1000 },
108 { 34, 5, 6, 3, 63, 1000 },
[all …]
/openbmc/linux/arch/arm64/tools/
H A Dsysreg52 Res0 63:32
57 Res0 63:31
64 Res0 63:36
92 Res0 63:32
97 Res0 63:32
102 Res0 63:1
107 Res0 63:32
148 Res0 63:32
188 Res0 63:32
238 Res0 63:16
[all …]
/openbmc/linux/arch/s390/include/asm/
H A Dctl_reg.h13 #define CR0_CLOCK_COMPARATOR_SIGN BIT(63 - 10)
14 #define CR0_LOW_ADDRESS_PROTECTION BIT(63 - 35)
15 #define CR0_FETCH_PROTECTION_OVERRIDE BIT(63 - 38)
16 #define CR0_STORAGE_PROTECTION_OVERRIDE BIT(63 - 39)
17 #define CR0_EMERGENCY_SIGNAL_SUBMASK BIT(63 - 49)
18 #define CR0_EXTERNAL_CALL_SUBMASK BIT(63 - 50)
19 #define CR0_CLOCK_COMPARATOR_SUBMASK BIT(63 - 52)
20 #define CR0_CPU_TIMER_SUBMASK BIT(63 - 53)
21 #define CR0_SERVICE_SIGNAL_SUBMASK BIT(63 - 54)
22 #define CR0_UNUSED_56 BIT(63 - 56)
[all …]
H A Dnmi.h17 #define MCIC_SUBCLASS_MASK (1ULL<<63 | 1ULL<<62 | 1ULL<<61 | \
22 #define MCCK_CODE_SYSTEM_DAMAGE BIT(63)
23 #define MCCK_CODE_EXT_DAMAGE BIT(63 - 5)
24 #define MCCK_CODE_CP BIT(63 - 9)
25 #define MCCK_CODE_STG_ERROR BIT(63 - 16)
26 #define MCCK_CODE_STG_KEY_ERROR BIT(63 - 18)
27 #define MCCK_CODE_STG_DEGRAD BIT(63 - 19)
28 #define MCCK_CODE_PSW_MWP_VALID BIT(63 - 20)
29 #define MCCK_CODE_PSW_IA_VALID BIT(63 - 23)
30 #define MCCK_CODE_STG_FAIL_ADDR BIT(63 - 24)
[all …]
H A Dirq.h104 ((1UL << (63 - 30)) /* Warning Track */ | \
105 (1UL << (63 - 48)) /* Malfunction Alert */ | \
106 (1UL << (63 - 49)) /* Emergency Signal */ | \
107 (1UL << (63 - 50)) /* External Call */ | \
108 (1UL << (63 - 52)) /* Clock Comparator */ | \
109 (1UL << (63 - 53)) /* CPU Timer */ | \
110 (1UL << (63 - 54)) /* Service Signal */ | \
111 (1UL << (63 - 57)) /* Interrupt Key */ | \
112 (1UL << (63 - 58)) /* Measurement Alert */ | \
113 (1UL << (63 - 59)) /* Timing Alert */ | \
[all …]
/openbmc/linux/drivers/misc/cxl/
H A Dcxl.h184 #define CXL_PSL_Control_tb (0x1ull << (63-63))
185 #define CXL_PSL_Control_Fr (0x1ull << (63-31))
186 #define CXL_PSL_Control_Fs_MASK (0x3ull << (63-29))
187 #define CXL_PSL_Control_Fs_Complete (0x3ull << (63-29))
190 #define CXL_PSL_DLCNTL_D (0x1ull << (63-28))
191 #define CXL_PSL_DLCNTL_C (0x1ull << (63-29))
192 #define CXL_PSL_DLCNTL_E (0x1ull << (63-30))
193 #define CXL_PSL_DLCNTL_S (0x1ull << (63-31))
199 #define CXL_PSL_SR_An_TA (1ull << (63-1)) /* Tags active, GA1: 0 */
201 #define CXL_PSL_SR_An_XLAT_hpt (0ull << (63-6))/* Hashed page table (HPT) mode */
[all …]
/openbmc/linux/drivers/infiniband/hw/irdma/
H A Ddefs.h380 #define IRDMA_CQPSQ_QHASH_ADDR0 GENMASK_ULL(63, 32)
382 #define IRDMA_CQPSQ_QHASH_ADDR2 GENMASK_ULL(63, 32)
384 #define IRDMA_CQPSQ_QHASH_WQEVALID BIT_ULL(63)
390 #define IRDMA_CQPSQ_STATS_WQEVALID BIT_ULL(63)
397 #define IRDMA_CQPSQ_WS_WQEVALID BIT_ULL(63)
412 #define IRDMA_CQPSQ_UP_WQEVALID BIT_ULL(63)
418 #define IRDMA_CQPSQ_QUERY_RDMA_FEATURES_WQEVALID BIT_ULL(63)
432 #define IRDMA_CQPHC_RAI_FACTOR GENMASK_ULL(63, 48)
436 #define IRDMA_CQPHC_RREDUCE_MPERIOD GENMASK_ULL(63, 32)
449 #define IRDMA_CQPHC_SQBASE GENMASK_ULL(63, 9)
[all …]
H A Duda_d.h28 #define IRDMA_UDA_QPSQ_MULTICAST BIT_ULL(63)
41 #define IRDMA_UDA_QPSQ_IMMDATA GENMASK_ULL(63, 0)
83 #define IRDMA_UDA_CQPSQ_MAV_PDINDEXLO GENMASK_ULL(63, 48)
85 #define IRDMA_UDA_CQPSQ_MAV_ARPINDEX GENMASK_ULL(63, 48)
89 #define IRDMA_UDA_CQPSQ_MAV_ADDR0 GENMASK_ULL(63, 32)
91 #define IRDMA_UDA_CQPSQ_MAV_ADDR2 GENMASK_ULL(63, 32)
93 #define IRDMA_UDA_CQPSQ_MAV_WQEVALID BIT_ULL(63)
106 #define IRDMA_UDA_CQPSQ_MG_WQEVALID BIT_ULL(63)
118 #define IRDMA_UDA_CQPSQ_QHASH_ADDR0 GENMASK_ULL(63, 32)
120 #define IRDMA_UDA_CQPSQ_QHASH_ADDR2 GENMASK_ULL(63, 32)
[all …]
/openbmc/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_masking.c19 r2 s>>= 63; \ in test_out_of_bounds_1()
39 r2 s>>= 63; \ in test_out_of_bounds_2()
59 r2 s>>= 63; \ in test_out_of_bounds_3()
79 r2 s>>= 63; \ in test_out_of_bounds_4()
99 r2 s>>= 63; \ in test_out_of_bounds_5()
119 r2 s>>= 63; \ in test_out_of_bounds_6()
139 r2 s>>= 63; \ in test_out_of_bounds_7()
159 r2 s>>= 63; \ in test_out_of_bounds_8()
179 r2 s>>= 63; \ in test_out_of_bounds_9()
199 r2 s>>= 63; \ in test_out_of_bounds_10()
[all …]
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dqcow2-internal-snapshots.out34 (qemu) qemu-io disk0 "write -P0x33 63k 2k"
37 (qemu) qemu-io disk0 "read -P0x11 0 63k"
39 63 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
40 (qemu) qemu-io disk0 "read -P0x33 63k 2k"
43 (qemu) qemu-io disk0 "read -P0x11 65k 63k"
45 63 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
60 63 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
64 63 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
70 (qemu) qemu-io disk0 "read -P0x11 0 63k"
72 63 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
[all …]
H A Dqcow2-internal-snapshots94 echo 'qemu-io disk0 "write -P0x33 63k 2k"'
95 echo 'qemu-io disk0 "read -P0x11 0 63k"'
96 echo 'qemu-io disk0 "read -P0x33 63k 2k"'
97 echo 'qemu-io disk0 "read -P0x11 65k 63k"'
117 -c "read -P0x11 0 63k" \
118 -c "read -P0x33 63k 2k" \
119 -c "read -P0x11 65k 63k" \
128 echo 'qemu-io disk0 "read -P0x11 0 63k"'
129 echo 'qemu-io disk0 "read -P0x33 63k 2k"'
130 echo 'qemu-io disk0 "read -P0x11 65k 63k"'
/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_npc_hash.h104 GENMASK_ULL(63, 0),
105 GENMASK_ULL(63, 0),
108 GENMASK_ULL(63, 0),
109 GENMASK_ULL(63, 0),
115 GENMASK_ULL(63, 0),
116 GENMASK_ULL(63, 0),
119 GENMASK_ULL(63, 0),
120 GENMASK_ULL(63, 0),
127 [0] = GENMASK_ULL(63, 32), /* MSB 32 bit is mask and LSB 32 bit is offset. */
128 [1] = GENMASK_ULL(63, 32), /* MSB 32 bit is mask and LSB 32 bit is offset. */
[all …]
/openbmc/linux/tools/testing/nvdimm/test/
H A Dndtest.h9 #define PAPR_PMEM_UNARMED (1ULL << (63 - 0))
11 #define PAPR_PMEM_SHUTDOWN_DIRTY (1ULL << (63 - 1))
13 #define PAPR_PMEM_EMPTY (1ULL << (63 - 3))
14 #define PAPR_PMEM_HEALTH_CRITICAL (1ULL << (63 - 4))
16 #define PAPR_PMEM_HEALTH_FATAL (1ULL << (63 - 5))
18 #define PAPR_PMEM_HEALTH_UNHEALTHY (1ULL << (63 - 6))
24 #define PAPR_PMEM_SAVE_FAILED (1ULL << (63 - 10))
/openbmc/linux/Documentation/sound/cards/
H A Daudigy-mixer.rst243 * 0 - mono, A destination (FX-bus 0-63), default 0
244 * 1 - mono, B destination (FX-bus 0-63), default 1
245 * 2 - mono, C destination (FX-bus 0-63), default 2
246 * 3 - mono, D destination (FX-bus 0-63), default 3
247 * 4 - mono, E destination (FX-bus 0-63), default 4
248 * 5 - mono, F destination (FX-bus 0-63), default 5
249 * 6 - mono, G destination (FX-bus 0-63), default 6
250 * 7 - mono, H destination (FX-bus 0-63), default 7
251 * 8 - left, A destination (FX-bus 0-63), default 0
252 * 9 - left, B destination (FX-bus 0-63), default 1
[all …]
/openbmc/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7100.c229 JH71X0_GDIV(JH7100_CLK_UART0_CORE, "uart0_core", 0, 63, JH7100_CLK_PERH1_SRC),
231 JH71X0_GDIV(JH7100_CLK_UART1_CORE, "uart1_core", 0, 63, JH7100_CLK_PERH1_SRC),
233 JH71X0_GDIV(JH7100_CLK_SPI0_CORE, "spi0_core", 0, 63, JH7100_CLK_PERH1_SRC),
235 JH71X0_GDIV(JH7100_CLK_SPI1_CORE, "spi1_core", 0, 63, JH7100_CLK_PERH1_SRC),
237 JH71X0_GDIV(JH7100_CLK_I2C0_CORE, "i2c0_core", 0, 63, JH7100_CLK_PERH1_SRC),
239 JH71X0_GDIV(JH7100_CLK_I2C1_CORE, "i2c1_core", 0, 63, JH7100_CLK_PERH1_SRC),
242 JH71X0_GDIV(JH7100_CLK_UART2_CORE, "uart2_core", 0, 63, JH7100_CLK_PERH0_SRC),
244 JH71X0_GDIV(JH7100_CLK_UART3_CORE, "uart3_core", 0, 63, JH7100_CLK_PERH0_SRC),
246 JH71X0_GDIV(JH7100_CLK_SPI2_CORE, "spi2_core", 0, 63, JH7100_CLK_PERH0_SRC),
248 JH71X0_GDIV(JH7100_CLK_SPI3_CORE, "spi3_core", 0, 63, JH7100_CLK_PERH0_SRC),
[all …]
/openbmc/linux/arch/powerpc/include/asm/
H A Dhvcall.h91 #define H_NOOP -63
121 #define H_LARGE_PAGE (1UL<<(63-16))
122 #define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */
123 #define H_R_XLATE (1UL<<(63-25)) /* include a valid logical page num in the pte if the valid bit i…
124 #define H_READ_4 (1UL<<(63-26)) /* Return 4 PTEs */
125 #define H_PAGE_STATE_CHANGE (1UL<<(63-28))
126 #define H_PAGE_UNUSED ((1UL<<(63-29)) | (1UL<<(63-30)))
128 #define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1UL<<(63-31)))
130 #define H_AVPN (1UL<<(63-32)) /* An avpn is provided as a sanity test */
131 #define H_ANDCOND (1UL<<(63-33))
[all …]
/openbmc/linux/arch/x86/include/asm/
H A Dsev-common.h23 /* GHCBData[63:48] */ \
53 /* GHCBData[63:32] */ \
63 /* GHCBData[63:12] */ \
70 /* GHCBData[63:12] */ \
71 (((u64)(v) & GENMASK_ULL(63, 12)) >> 12)
96 /* GHCBData[63:32] */ \
97 (((u64)(val) & GENMASK_ULL(63, 32)) >> 32)
103 /* GHCBData[63:12] */ \
104 (((u64)(v) & GENMASK_ULL(63, 12)) >> 12)
/openbmc/linux/Documentation/translations/zh_CN/core-api/
H A Dpacking.rst61 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
75 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
87 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
100 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
112 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
124 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
134 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
145 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
/openbmc/linux/drivers/crypto/cavium/cpt/
H A Dcpt_hw_types.h43 * Bits <63:49> are ignored by hardware; software should use a
59 * Bits <63:49> are ignored by hardware; software should
62 * Bits <63:49>, <2:0> are ignored by hardware, treated as always 0x0.
179 * reserved_40_63:24 [63:40] Reserved.
217 * reserved_48_63:16 [63:48] reserved
242 * reserved_60_63:4 [63:60] reserved.
324 * reserved_49_63:15 [63:49] Reserved.
356 * reserved_5_63:59 [63:5] Reserved.
358 * CPT(0..1)_VQ(0..63)_MISC_INT[SWERR].
360 * CPT(0..1)_VQ(0..63)_MISC_INT[NWRP].
[all …]
/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_RF.c404 "FCC", "20M", "CCK", "1T", "12", "63",
407 "FCC", "20M", "CCK", "1T", "13", "63",
410 "FCC", "20M", "CCK", "1T", "14", "63",
411 "ETSI", "20M", "CCK", "1T", "14", "63",
446 "FCC", "20M", "OFDM", "1T", "12", "63",
449 "FCC", "20M", "OFDM", "1T", "13", "63",
452 "FCC", "20M", "OFDM", "1T", "14", "63",
453 "ETSI", "20M", "OFDM", "1T", "14", "63",
454 "MKK", "20M", "OFDM", "1T", "14", "63",
488 "FCC", "20M", "HT", "1T", "12", "63",
[all …]
/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h19 #define GENMASK_ULL(h, l) (((~0ULL) >> (63 - (h) + (l))) << (l))
37 #define RISCV_IOMMU_FQ_HDR_DID GENMASK_ULL(63, 40)
52 #define RISCV_IOMMU_PREQ_HDR_DID GENMASK_ULL(63, 40)
67 #define RISCV_IOMMU_ATP_MODE_FIELD GENMASK_ULL(63, 60)
196 #define RISCV_IOMMU_TR_REQ_CTL_DID GENMASK_ULL(63, 40)
286 #define RISCV_IOMMU_CMD_IOFENCE_DATA GENMASK_ULL(63, 32)
293 #define RISCV_IOMMU_CMD_IODIR_DID GENMASK_ULL(63, 40)
303 #define RISCV_IOMMU_CMD_ATS_DSEG GENMASK_ULL(63, 56)
361 #define RISCV_IOMMU_PC_TA_RESERVED GENMASK_ULL(63, 32)
384 #define RISCV_IOMMU_PREQ_HDR_DID GENMASK_ULL(63, 40)
[all …]
/openbmc/linux/drivers/net/ethernet/ibm/ehea/
H A Dehea_phyp.c144 #define H_ALL_RES_QP_RES_TYP EHEA_BMASK_IBM(56, 63)
148 #define H_ALL_RES_QP_PD EHEA_BMASK_IBM(32, 63)
160 #define H_ALL_RES_QP_MAX_R3SGE EHEA_BMASK_IBM(61, 63)
165 #define H_ALL_RES_QP_PORT_NUM EHEA_BMASK_IBM(48, 63)
177 #define H_ALL_RES_QP_ACT_R3WQE EHEA_BMASK_IBM(48, 63)
188 #define H_ALL_RES_QP_SIZE_RQ1 EHEA_BMASK_IBM(32, 63)
190 #define H_ALL_RES_QP_SIZE_RQ3 EHEA_BMASK_IBM(32, 63)
194 #define H_ALL_RES_QP_LIOBN_RQ1 EHEA_BMASK_IBM(32, 63)
196 #define H_ALL_RES_QP_LIOBN_RQ3 EHEA_BMASK_IBM(32, 63)
333 #define H_ALL_RES_EQ_RES_TYPE EHEA_BMASK_IBM(56, 63)
[all …]
/openbmc/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pip-defs.h74 #define CVMX_PIP_PRT_CFGBX(offset) (CVMX_ADD_IO_SEG(0x00011800A0008000ull) + ((offset) & 63) * 8)
75 #define CVMX_PIP_PRT_CFGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000200ull) + ((offset) & 63) * 8)
76 #define CVMX_PIP_PRT_TAGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000400ull) + ((offset) & 63) * 8)
77 #define CVMX_PIP_QOS_DIFFX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000600ull) + ((offset) & 63) * 8)
82 #define CVMX_PIP_STAT0_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000800ull) + ((offset) & 63) * 80)
83 #define CVMX_PIP_STAT0_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040000ull) + ((offset) & 63) * 128)
84 #define CVMX_PIP_STAT10_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001480ull) + ((offset) & 63) * 16)
85 #define CVMX_PIP_STAT10_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040050ull) + ((offset) & 63) * 128)
86 #define CVMX_PIP_STAT11_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001488ull) + ((offset) & 63) * 16)
87 #define CVMX_PIP_STAT11_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040058ull) + ((offset) & 63) * 128)
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dciu2.txt13 the CIU and may have a value between 0 and 63. The second cell is
14 the bit within the bank and may also have a value between 0 and 63.
21 * 1) Controller register (0..63)
22 * 2) Bit within the register (0..63)
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dcavium-pip.txt63 local-mac-address = [ 00 0f b7 10 63 60 ];
69 local-mac-address = [ 00 0f b7 10 63 61 ];
75 local-mac-address = [ 00 0f b7 10 63 62 ];
81 local-mac-address = [ 00 0f b7 10 63 63 ];
95 local-mac-address = [ 00 0f b7 10 63 64 ];

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