/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | sifive,fu540-c000-pdma.yaml | 4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml# 7 title: SiFive Unleashed Rev C000 Platform DMA 15 Platform DMA is a DMA engine of SiFive Unleashed. It supports 4 23 https://static.dev.sifive.com/FU540-C000-v1.0.pdf 32 - sifive,fu540-c000-pdma 37 "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the 49 description: For backwards-compatibility, the default value is 4 51 maximum: 4 52 default: 4 67 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pwm/ |
H A D | pwm-sifive.yaml | 30 - sifive,fu540-c000-pwm 31 - sifive,fu740-c000-pwm 35 compatible strings are "sifive,fu540-c000-pwm" and 36 "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the 51 maxItems: 4 53 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator. 66 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
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/openbmc/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu540-c000.dtsi | 11 compatible = "sifive,fu540-c000", "sifive,fu540"; 112 cpu4: cpu@4 { 126 reg = <4>; 167 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; 181 compatible = "sifive,fu540-c000-prci"; 187 compatible = "sifive,fu540-c000-uart", "sifive,uart0"; 190 interrupts = <4>; 195 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0"; 200 dma-channels = <4>; 204 compatible = "sifive,fu540-c000-uart", "sifive,uart0"; [all …]
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H A D | fu740-c000.dtsi | 11 compatible = "sifive,fu740-c000", "sifive,fu740"; 113 cpu4: cpu@4 { 170 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; 182 compatible = "sifive,fu740-c000-prci"; 189 compatible = "sifive,fu740-c000-uart", "sifive,uart0"; 197 compatible = "sifive,fu740-c000-uart", "sifive,uart0"; 205 compatible = "sifive,fu740-c000-i2c", "sifive,i2c0"; 217 compatible = "sifive,fu740-c000-i2c", "sifive,i2c0"; 229 compatible = "sifive,fu740-c000-spi", "sifive,spi0"; 240 compatible = "sifive,fu740-c000-spi", "sifive,spi0"; [all …]
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H A D | hifive-unleashed-a00.dts | 4 #include "fu540-c000.dtsi" 14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000", 104 spi-tx-bus-width = <4>; 105 spi-rx-bus-width = <4>;
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/openbmc/linux/Documentation/devicetree/bindings/cache/ |
H A D | sifive,ccache0.yaml | 25 - sifive,fu540-c000-ccache 26 - sifive,fu740-c000-ccache 37 - sifive,fu540-c000-ccache 38 - sifive,fu740-c000-ccache 46 - const: sifive,fu540-c000-ccache 90 - sifive,fu740-c000-ccache 99 minItems: 4 113 - sifive,fu740-c000-ccache 157 compatible = "sifive,fu540-c000-ccache", "cache";
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-sifive.yaml | 21 - sifive,fu540-c000-spi 22 - sifive,fu740-c000-spi 28 "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0 62 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8] 76 compatible = "sifive,fu540-c000-spi", "sifive,spi0";
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/openbmc/openbmc/meta-quanta/meta-gbs/recipes-phosphor/sensors/ |
H A D | phosphor-hwmon_%.bbappend | 6 i2c@82000/sbtsi@4c \ 15 i2c@8c000/max34451@4e \ 16 i2c@8c000/vrm@5d \ 17 i2c@8c000/vrm@5e \
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sa8540p-pmics.dtsi | 25 pmm8540a_gpios: gpio@c000 { 36 pmm8540c: pmic@4 { 51 pmm8540c_gpios: gpio@c000 { 68 pmm8540e_gpios: gpio@c000 { 85 pmm8540g_gpios: gpio@c000 {
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/openbmc/linux/arch/arm/boot/dts/nxp/mxs/ |
H A D | imx23-evk.dts | 56 nand-controller@8000c000 { 66 bus-width = <4>; 105 fsl,lradc-touchscreen-wires = <4>; 114 auart0: serial@8006c000 { 126 usbphy0: usbphy@8007c000 { 141 brightness-levels = <0 4 8 16 32 64 128 255>;
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H A D | imx23.dtsi | 77 nand-controller@8000c000 { 87 dmas = <&dma_apbh 4>; 224 mmc0_4bit_pins_a: mmc0-4bit@0 { 276 mmc1_4bit_pins_a: mmc1-4bit@0 { 404 digctl@8001c000 { 443 efuse@8002c000 { 494 dmas = <&dma_apbx 4>; 518 audio-in@8004c000 { 554 rtc@8005c000 { 576 auart0: serial@8006c000 { [all …]
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/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | t4240si-post.dtsi | 78 0000 0 0 4 &mpic 3 1 0 0 104 0000 0 0 4 &mpic 7 1 0 0 130 0000 0 0 4 &mpic 11 1 0 0 155 0000 0 0 3 &mpic 4 1 0 0 156 0000 0 0 4 &mpic 8 1 0 0 332 bman-portal@c000 { 352 bman-portal@1c000 { 372 bman-portal@2c000 { 392 bman-portal@3c000 { 412 bman-portal@4c000 { [all …]
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H A D | b4860si-post.dtsi | 39 compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4"; 116 bman-portal@3c000 { 136 bman-portal@4c000 { 156 bman-portal@5c000 { 175 qportal15: qman-portal@3c000 { 199 qportal19: qman-portal@4c000 { 223 qportal23: qman-portal@5c000 { 261 /include/ "qoriq-fman3-0-1g-4.dtsi"
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H A D | t2081si-post.dtsi | 79 0000 0 0 4 &mpic 3 1 0 0 106 0000 0 0 4 &mpic 7 1 0 0 133 0000 0 0 4 &mpic 11 1 0 0 159 0000 0 0 3 &mpic 4 1 0 0 160 0000 0 0 4 &mpic 8 1 0 0 262 bman-portal@c000 { 282 bman-portal@1c000 { 302 bman-portal@2c000 { 322 bman-portal@3c000 { 362 qportal3: qman-portal@c000 { [all …]
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H A D | b4si-post.dtsi | 59 compatible = "fsl,b4-pcie", "fsl,qoriq-pcie-v2.4"; 79 0000 0 0 4 &mpic 3 1 0 0 166 bman-portal@c000 { 186 bman-portal@1c000 { 206 bman-portal@2c000 { 246 qportal3: qman-portal@c000 { 270 qportal7: qman-portal@1c000 { 294 qportal11: qman-portal@2c000 { 340 interrupts = <16 2 1 4>; 421 compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/i2c/ |
H A D | opencores,i2c-ocores.yaml | 21 - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC 22 - sifive,fu540-c000-i2c # Opencore based IP block FU540-C000 SoC 55 enum: [1, 2, 4]
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | cdns,macb.yaml | 57 - sifive,fu540-c000-gem # SiFive FU540-C000 SoC 66 - description: GEMGXL Management block registers on SiFive FU540-C000 SoC 120 Width of the SRAM is platform dependent, and can be 4, 8 or 16 bytes. 165 const: sifive,fu540-c000-gem 205 interrupts = <0 59 4>, <0 59 4>;
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/openbmc/u-boot/arch/arm/dts/ |
H A D | tegra114-dalmore.dts | 15 i2c1 = "/i2c@7000c000"; 30 i2c@7000c000 { 62 bus-width = <4>; 75 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
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H A D | tegra124-venice2.dts | 15 i2c1 = "/i2c@7000c000"; 33 i2c@7000c000 { 77 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; 78 bus-width = <4>; 90 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
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H A D | tegra210-p2571.dts | 15 i2c1 = "/i2c@7000c000"; 32 i2c@7000c000 { 80 power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; 81 bus-width = <4>;
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H A D | tegra30-tamonten.dtsi | 16 i2c0 = "/i2c@7000c000"; 28 i2c@7000c000 { 60 bus-width = <4>;
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H A D | tegra30-colibri.dts | 15 i2c1 = "/i2c@7000c000"; 34 i2c@7000c000 { 66 bus-width = <4>;
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H A D | tegra20-colibri.dts | 15 i2c1 = "/i2c@7000c000"; 65 i2c@7000c000 { 111 bus-width = <4>; 118 brightness-levels = <255 128 64 32 16 8 4 0>; 121 enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;
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/openbmc/linux/drivers/dma/sf-pdma/ |
H A D | sf-pdma.h | 13 * SiFive FU540-C000 v1.0 14 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf 25 #define PDMA_MAX_NR_CH 4 60 void __iomem *ctrl; /* 4 bytes */ 62 void __iomem *xfer_type; /* 4 bytes */ 68 void __iomem *act_type; /* 4 bytes */
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/openbmc/linux/arch/arm/boot/dts/nxp/lpc/ |
H A D | lpc32xx.dtsi | 201 ssp1: spi@2008c000 { 237 i2s1: i2s@2009c000 { 339 sic1: interrupt-controller@4000c000 { 375 uart7: serial@4001c000 { 397 timer4: timer@4002c000 { 409 interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 415 watchdog: watchdog@4003c000 { 454 timer1: timer@4004c000 { 480 pwm1: pwm@4005c000 {
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