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/openbmc/u-boot/drivers/i2c/
H A Daspeed_i2c_global.c30 * I2CG10[23:16] base clk3 for Standard-mode (100Khz) min tBuf 4.7us
31 * 0x3c : 100.8Khz : 3.225Mhz : 4.96us
32 * 0x3d : 99.2Khz : 3.174Mhz : 5.04us
33 * 0x3e : 97.65Khz : 3.125Mhz : 5.12us
34 * 0x40 : 97.75Khz : 3.03Mhz : 5.28us
35 * 0x41 : 99.5Khz : 2.98Mhz : 5.36us (default)
36 * I2CG10[15:8] base clk2 for Fast-mode (400Khz) min tBuf 1.3us
37 * 0x12 : 400Khz : 10Mhz : 1.6us
38 * I2CG10[7:0] base clk1 for Fast-mode Plus (1Mhz) min tBuf 0.5us
39 * 0x08 : 1Mhz : 20Mhz : 0.8us
/openbmc/linux/drivers/phy/marvell/
H A Dphy-mmp3-usb.c211 * | 200us | 400us | 40| 400us | USB PHY READY in mmp3_usb_phy_calibrate()
216 udelay(400); in mmp3_usb_phy_calibrate()
220 udelay(400); in mmp3_usb_phy_calibrate()
/openbmc/u-boot/arch/arm/mach-sunxi/dram_timings/
H A Dddr2_v3s.c38 u32 tdinit0 = (400 * CONFIG_DRAM_CLK) + 1; /* 400us */ in mctl_set_timing_params()
40 u32 tdinit2 = (200 * CONFIG_DRAM_CLK) + 1; /* 200us */ in mctl_set_timing_params()
41 u32 tdinit3 = (1 * CONFIG_DRAM_CLK) + 1; /* 1us */ in mctl_set_timing_params()
/openbmc/linux/drivers/regulator/
H A Drk808-regulator.c444 * i2c is 400kHz (2.5us per bit) and we must transmit _at least_ in rk808_buck1_2_i2c_set_voltage_sel()
446 * got more than 65 us between each voltage change and thus in rk808_buck1_2_i2c_set_voltage_sel()
447 * won't ramp faster than ~1500 uV / us. in rk808_buck1_2_i2c_set_voltage_sel()
459 * 100000uv/us, wait 1us to make sure the target voltage to be stable, in rk808_buck1_2_i2c_set_voltage_sel()
1012 BIT(0), 400),
1015 BIT(1), 400),
1018 BIT(2), 400),
1186 BIT(0), 400),
1189 BIT(1), 400),
1205 .enable_time = 400,
[all …]
/openbmc/linux/include/linux/sunrpc/
H A Dmsg_prot.h43 #define RPC_MAX_AUTH_SIZE (400)
131 * body<RPC_MAX_AUTH_SIZE> 100 xdr units = 400 bytes
136 * body<RPC_MAX_AUTH_SIZE> 100 xdr units = 400 bytes
176 * US-ASCII string:
193 * US-ASCII string:
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Drichtek,rt6245-regulator.yaml55 delay time 0us, 10us, 20us, 40us. If this property is missing then keep
63 Buck switch frequency selection. Each respective value means 400KHz,
H A Dqcom-labibb-regulator.yaml27 qcom,soft-start-us:
29 enum: [200, 400, 600, 800]
/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Datomisp_internal.h55 /* MRFLD with 0x1179: max ISP freq limited to 400MHz */
57 /* MRFLD with 0x117a: max ISP freq is 400MHz and max freq at Vmin is 200MHz */
105 * 1000 us is a reasonable value considering that the processing
106 * time is typically ~2000 us.
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15_a7.dts92 entry-latency-us = <1000>;
93 exit-latency-us = <700>;
94 min-residency-us = <2000>;
100 entry-latency-us = <1000>;
101 exit-latency-us = <500>;
102 min-residency-us = <2500>;
162 compatible = "arm,cci-400";
169 compatible = "arm,cci-400-ctrl-if";
175 compatible = "arm,cci-400-ctrl-if";
181 compatible = "arm,cci-400-pmu,r0";
/openbmc/linux/arch/arm/include/asm/
H A Dkgdb.h19 * it will send us an SWI command to write into memory as the
27 * switch from SVC to UND mode, allowing us to save full kernel state.
79 #define BUFMAX 400
/openbmc/linux/arch/arm64/boot/dts/synaptics/
H A Dberlin4ct.dtsi77 entry-latency-us = <75>;
78 exit-latency-us = <155>;
79 min-residency-us = <1000>;
117 compatible = "arm,gic-400";
135 gpio0: gpio@400 {
/openbmc/u-boot/include/configs/
H A Dimx7_spl.h20 * which consists of a 4K header in front of us that contains the IVT, DCD
37 #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */
H A Dimx6_spl.h19 * which consists of a 4K header in front of us that contains the IVT, DCD
36 #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */
/openbmc/linux/drivers/hwmon/
H A Dltc4260.c53 /* 400 mV resolution. Convert to mV. */ in ltc4260_get_value()
54 val = val * 400; in ltc4260_get_value()
182 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
/openbmc/linux/include/linux/mtd/
H A Dspinand.h176 * tPROG 300us to 400us
177 * tREAD 25us to 100us
180 * For reset, 5us/10us/500us if the device is respectively
182 * issue a RESET when the device is IDLE, 5us is selected for both initial
194 #define SPINAND_WAITRDY_TIMEOUT_MS 400
/openbmc/phosphor-misc/http-redirect/
H A Dhttp-redirect.awk12 errors[400] = "400 Bad Request"
62 respond_error(400)
102 respond_error(400)
116 respond_error(400) # Bad Request (bogus encoding)
127 respond_error(400) # Bad Request (didn't parse)
134 respond_error(400)
148 respond_error(400)
181 # US ASCII (0-127) excluding CTL (000-037, 177, SP (040), seperators
/openbmc/linux/drivers/i2c/busses/
H A Di2c-designware-common.c197 * Only standard mode at 100kHz, fast mode at 400kHz, in i2c_dw_validate_speed()
206 "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n", in i2c_dw_validate_speed()
386 * should be 0.3 us, for safety. in i2c_dw_scl_lcnt()
463 * transfer supported by the driver (for 400KHz this is in __i2c_dw_disable()
464 * 25us) to ensure the I2C ENABLE bit is already set in __i2c_dw_disable()
492 * transfer supported by the driver (for 400KHz this is in __i2c_dw_disable()
493 * 25us) as described in the DesignWare I2C databook. in __i2c_dw_disable()
/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dqcom-spmi-adc-tm-hc.yaml79 qcom,hw-settle-time-us:
81 enum: [0, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000, 6000, 8000, 10000]
145 qcom,hw-settle-time-us = <200>;
H A Dqcom-spmi-adc-tm5.yaml84 qcom,hw-settle-time-us:
86 … enum: [15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000]
201 qcom,hw-settle-time-us = <200>;
249 qcom,hw-settle-time-us = <200>;
257 qcom,hw-settle-time-us = <200>;
/openbmc/linux/tools/testing/selftests/powerpc/pmu/ebb/
H A Dlost_exception_test.c49 orig_period = max_period = sample_period = 400; in test_body()
56 * us entering the kernel to do the syscall. We then need the in test_body()
/openbmc/linux/drivers/clocksource/
H A Dtimer-meson6.c134 .rating = 400,
170 /* Set 1us for timer E */ in meson6_timer_init()
181 /* Timer A base 1us */ in meson6_timer_init()
/openbmc/linux/drivers/iio/light/
H A Dzopt2201.c43 #define ZOPT2201_MEAS_RES_20BIT 0 /* takes 400 ms */
106 unsigned long us; /* measurement time in micro seconds */ member
170 { 0, 400, 4, 1 },
197 unsigned long t = zopt2201_resolution[data->res].us; in zopt2201_read()
297 *val2 = zopt2201_resolution[data->res].us; in zopt2201_read_raw()
328 if (val2 == zopt2201_resolution[i].us) { in zopt2201_write_resolution()
442 zopt2201_resolution[i].us); in zopt2201_show_int_time_available()
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-r2.dts73 entry-latency-us = <300>;
74 exit-latency-us = <1200>;
75 min-residency-us = <2000>;
82 entry-latency-us = <400>;
83 exit-latency-us = <1200>;
84 min-residency-us = <2500>;
H A Djuno-r1.dts73 entry-latency-us = <300>;
74 exit-latency-us = <1200>;
75 min-residency-us = <2000>;
82 entry-latency-us = <400>;
83 exit-latency-us = <1200>;
84 min-residency-us = <2500>;
H A Djuno.dts72 entry-latency-us = <300>;
73 exit-latency-us = <1200>;
74 min-residency-us = <2000>;
81 entry-latency-us = <400>;
82 exit-latency-us = <1200>;
83 min-residency-us = <2500>;

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