| /openbmc/u-boot/board/google/ |
| H A D | Kconfig | 15 i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
18 reader, microphone and speakers, display port and 32GB SATA
37 Haswell Celeron 2955U Dual Core CPU with 2GB of SDRAM. It has a
40 video output and a 16GB SATA solid state drive. There is no Chrome
47 Broadwell U Core i5 or Core i7 CPU with either 8GB or 16GB of
51 There is a solid state drive, either 32GB or 64GB. There is a
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/hddtemp/hddtemp/ |
| H A D | hddtemp.db | 13 # FUJITSU FUJITSU MPF3102AH 10.0GB
14 # FUJITSU FUJITSU MPG3204AH E 20.0GB
15 # FUJITSU FUJITSU MPG3307AT 30.0GB
16 # FUJITSU FUJITSU MPG3409AH 40.0GB
17 # FUJITSU FUJITSU MPG3409AH EF 40.0GB
18 # HITACHI HITACHI_DK23CA-10 9.8GB
19 # HITACHI HITACHI_DK23CA-15 14.7GB
20 # SAMSUNG SAMSUNG SV3012H 29.4GB
21 # SEAGATE ST310210A 10.0GB
22 # SEAGATE ST310211A 9.8GB
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| /openbmc/phosphor-fan-presence/control/config_files/p10bmc/com.ibm.Hardware.Chassis.Model.Everest/ |
| H A D | pcie_cards.json | 84 "name": "Everglades 10Gb 2Port",
92 "name": "Everglades 25Gb 2Port",
100 "name": "Haleakala EN 2Port 100Gb",
148 "name": "Moso PCIe4 64Gb 2-port Fibre Channel Adapter",
156 "name": "Dragonhead PCIe4 32Gb 4-port Fibre Channel Adapter",
172 "name": "Horton 32Gb 4-port Fibre Channel Adapter",
180 "name": "Nool 64Gb 2-port Fibre Channel Adapter",
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| /openbmc/u-boot/arch/arm/mach-rockchip/ |
| H A D | sdram_common.c | 52 * This is workaround for issue we can't get correct size for 4GB ram in rockchip_sdram_size()
53 * in 32bit system and available before we really need ram space in rockchip_sdram_size()
54 * out of 4GB, eg.enable ARM LAPE(rk3288 supports 8GB ram). in rockchip_sdram_size()
55 * The size of 4GB is '0x1 00000000', and this value will be truncated in rockchip_sdram_size()
56 * to 0 in 32bit system, and system can not get correct ram size. in rockchip_sdram_size()
57 * Rockchip SoCs reserve a blob of space for peripheral near 4GB, in rockchip_sdram_size()
59 * ram in 4GB, so we can use this directly to workaround the issue. in rockchip_sdram_size()
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| /openbmc/phosphor-fan-presence/control/config_files/p10bmc/com.ibm.Hardware.Chassis.Model.Fuji/ |
| H A D | pcie_cards.json | 84 "name": "Everglades 10Gb 2Port",
92 "name": "Everglades 25Gb 2Port",
100 "name": "Haleakala EN 2Port 100Gb",
156 "name": "Moso PCIe4 64Gb 2-port Fibre Channel Adapter",
164 "name": "Dragonhead PCIe4 32Gb 4-port Fibre Channel Adapter",
180 "name": "Horton 32Gb 4-port Fibre Channel Adapter",
188 "name": "Nool 64Gb 2-port Fibre Channel Adapter",
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| /openbmc/u-boot/board/gateworks/gw_ventana/ |
| H A D | gw_ventana_spl.c | 25 #define GSC_EEPROM_DDR_WIDTH 0x2D /* enum (32,64) bit */
148 /* MT41K64M16JT-125 (1Gb density) */
162 /* MT41K128M16JT-125 (2Gb density) */
176 /* MT41K256M16HA-125 (4Gb density) */
190 /* MT41K512M16HA-125 (8Gb density) */
489 /* width of data bus:0=16,1=32,2=64 */ in spl_dram_init()
490 .dsize = width/32, in spl_dram_init()
491 /* config for full 4GB range so that get_mem_size() works */ in spl_dram_init()
492 .cs_density = 32, /* 32Gb per CS */ in spl_dram_init()
510 .refsel = 1, /* Refresh cycles at 32KHz */ in spl_dram_init()
[all …]
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| /openbmc/u-boot/board/freescale/ls1046aqds/ |
| H A D | README | 23 - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s
56 0x00_8000_0000 - 0x00_FFFF_FFFF DRAM1 2GB
59 0x08_8000_0000 - 0x09_FFFF_FFFF DRAM2 6GB
60 0x40_0000_0000 - 0x47_FFFF_FFFF PCI Express1 32G
61 0x48_0000_0000 - 0x4F_FFFF_FFFF PCI Express2 32G
62 0x50_0000_0000 - 0x57_FFFF_FFFF PCI Express3 32G
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| /openbmc/u-boot/doc/ |
| H A D | README.b4860qds | 45 . 32 Kbyte L1 ICache per e6500/SC3900 core
46 . 32 Kbyte L1 DCache per e6500/SC3900 core
61 . 182 32-bit timers
65 - DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 4 GB
66 of memory in two ranks of 2 GB.
67 - DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 2 GB
180 0xF_F600_0000 0xF_F7FF_FFFF QMAN s/w portal 32 MB
181 0xF_F400_0000 0xF_F5FF_FFFF BMAN s/w portal 32 MB
187 0xF_0040_0000 0xF_9FFF_FFFF Free 12 GB
188 0xF_0000_0000 0xF_01FF_FFFF DCSR 32 MB
[all …]
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| /openbmc/u-boot/board/freescale/ls1046ardb/ |
| H A D | README | 27 - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s
51 0x00_8000_0000 - 0x00_FFFF_FFFF DRAM1 2GB
54 0x08_8000_0000 - 0x09_FFFF_FFFF DRAM2 6GB
55 0x40_0000_0000 - 0x47_FFFF_FFFF PCI Express1 32G
56 0x48_0000_0000 - 0x4F_FFFF_FFFF PCI Express2 32G
57 0x50_0000_0000 - 0x57_FFFF_FFFF PCI Express3 32G
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| /openbmc/u-boot/arch/arm/mach-socfpga/ |
| H A D | mmu-arm64_s10.c | 14 /* MEM 2GB*/
21 /* FPGA 1.5GB */
44 /* DEVICE 32KB */
52 /* MEM 124GB */
59 /* DEVICE 4GB */
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| /openbmc/qemu/tests/tcg/x86_64/system/ |
| H A D | boot.S | 10 * which should drop us automatically into 32 bit mode ready to go. I've
61 * - `cs `: must be a 32-bit read/execute code segment with a base of ‘0’
63 * - `ds`, `es`: must be a 32-bit read/write data segment with a base of
66 * - `tr`: must be a 32-bit TSS (active) with a base of '0' and a limit
197 * segment descriptors. In 32 bit mode each segment each
267 .quad .Lpd + 7 + 0 * 4096 /* 0-1 GB */
268 .quad .Lpd + 7 + 1 * 4096 /* 1-2 GB */
269 .quad .Lpd + 7 + 2 * 4096 /* 2-3 GB */
270 .quad .Lpd + 7 + 3 * 4096 /* 3-4 GB */
274 .quad .Lpdp + 7 /* 0-512 GB */
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| /openbmc/qemu/tests/qemu-iotests/ |
| H A D | 272 | 4 # Test compressed write to a qcow2 image at an offset above 4 GB
47 # The idea is: Create an empty file, mark the first 4 GB as used, then
48 # do a compressed write that thus must be put beyond 4 GB.
50 # 32 bit mask, so qemu-img check will count a cluster before 4 GB as
61 # We want to cover 4 GB, those are 2048 clusters, equivalent to
74 # This should only print the leaked clusters in the first 4 GB
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| /openbmc/u-boot/arch/arm/mach-rockchip/rk3399/ |
| H A D | Kconfig | 26 * on-module eMMC (up to 256GB configurations available)
27 * on-module DDR3 (1GB, 2GB and 4GB configurations available)
40 * 16/32GB eMMC, uSD slot
60 It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 10.1",
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| /openbmc/u-boot/board/liebherr/mccmon6/ |
| H A D | spl.c | 173 /* DDR 64bit 2GB */
177 /* config for full 4GB range so that get_mem_size() works */
178 .cs_density = 32,
214 /* DDR 64bit 1GB */
218 /* config for full 4GB range so that get_mem_size() works */
219 .cs_density = 32,
231 /* DDR 32bit 512MB */
235 /* config for full 4GB range so that get_mem_size() works */
236 .cs_density = 32,
264 mx6sdl_dram_iocfg(32, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs); in spl_dram_init()
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| /openbmc/u-boot/board/vamrs/rock960_rk3399/ |
| H A D | README | 29 * eMMC: 16/32GB eMMC 5.1
37 * DRAM: 2GB/4GB LPDDR3 @ 1866MHz
42 * DRAM: 2GB/4GB DDR3 @ 1600MHz
129 Each sector is 512 bytes, which means the first stage offset is 32 KiB,
139 > dd if=idbspl.img of=/dev/mmcblk0 bs=1k seek=32
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| /openbmc/u-boot/arch/arm/mach-rockchip/rk3288/ |
| H A D | Kconfig | 30 functions. It includes 2 or 4GB of SDRAM and 16 or 32GB of
41 functions. It includes 2 or 4GB of SDRAM and 16GB of internal MMC.
50 also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
59 includes on-board eMMC and 2GB of SDRAM. Expansion connectors
68 also includes on-board eMMC and 1GB of SDRAM. Expansion connectors
76 ports, HDMI, micro-SD card, 16 GB eMMC and Gigabit Ethernet. It
95 2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
120 also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
138 8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
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| /openbmc/u-boot/drivers/ddr/fsl/ |
| H A D | ddr4_dimm_params.c | 37 * 0000 256Mb 32MB
39 * 0010 1Gb 128MB
40 * 0011 2Gb 256MB
41 * 0100 4Gb 512MB
42 * 0101 8Gb 1GB
43 * 0110 16Gb 2GB
44 * 0111 32Gb 4GB
50 * 010 32bits
58 * 011 32bits
202 * A17 only used for 16Gb and above devices. in ddr_compute_dimm_parameters()
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| H A D | ddr3_dimm_params.c | 29 * 0000 256Mb 32MB
31 * 0010 1Gb 128MB
32 * 0011 2Gb 256MB
33 * 0100 4Gb 512MB
34 * 0101 8Gb 1GB
35 * 0110 16Gb 2GB
41 * 010 32bits
49 * 011 32bits
295 * 1Gb 880 MTB (110ns) in ddr_compute_dimm_parameters()
296 * 2Gb 1280 MTB (160ns) in ddr_compute_dimm_parameters()
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| /openbmc/u-boot/board/intel/ |
| H A D | Kconfig | 16 4GB memory, HDMI/DP/VGA display, HD audio, SATA, USB2, USB3, SD, eMMC,
33 and Panther Point chipset. The board has 4GB RAM, with some other
41 with 1GB DDR2 soldered down memory and a carrier board with the
49 Atom Tangier CPU, 1 GB RAM integrated on package. There is also 4 GB
57 architecture. It includes an Intel Quark SoC X1000 processor, a 32-bit
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| /openbmc/u-boot/arch/arm/mach-uniphier/ |
| H A D | boards.c | 31 /* 1GB RAM board */
36 .width = 32,
40 .width = 32,
44 /* 2GB RAM board */
49 .width = 32,
53 .width = 32,
78 .width = 32,
82 .width = 32,
92 .width = 32,
96 .width = 32,
[all …]
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| /openbmc/u-boot/board/boundary/nitrogen6x/ |
| H A D | README | 74 nitrogen6q i.MX6Q/6D 1GB
75 nitrogen6dl i.MX6DL 1GB
77 nitrogen6q2g i.MX6Q/6D 2GB
78 nitrogen6dl2g i.MX6DL 2GB
79 nitrogen6s1g i.MX6S 1GB
86 The -6s variants use a 32-bit memory bus at 800MHz.
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| /openbmc/u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | sdram_rk3399.h | 80 /* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
82 /* die buswidth, 2:32bit, 1:16bit, 0:8bit */
85 * row_3_4 = 1: 6Gb or 12Gb die
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| /openbmc/u-boot/arch/x86/cpu/ |
| H A D | start16.S | 51 /* Finally restore BIST and jump to the 32-bit initialization code */
85 * 0x10 32bit code
86 * 0x18 32bit data/stack
107 * - Size = 4GB
109 * - Flags = 4kB Granularity, 32-bit
121 * - Size = 4GB
123 * - Flags = 4kB Granularity, 32-bit
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| /openbmc/u-boot/arch/riscv/cpu/generic/ |
| H A D | dram.c | 26 * Ensure that we run from first 4GB so that all in board_get_usable_ram_top()
27 * addresses used by U-Boot are 32bit addresses. in board_get_usable_ram_top()
29 * This in-turn ensures that 32bit DMA capable in board_get_usable_ram_top()
31 * provide 32bit DMA addresses only. in board_get_usable_ram_top()
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| /openbmc/u-boot/board/wandboard/ |
| H A D | spl.c | 222 /* DDR 64bit 2GB */
226 /* config for full 4GB range so that get_mem_size() works */
227 .cs_density = 32,
237 .refsel = 1, /* Refresh cycles at 32KHz */
265 /* DDR 64bit 1GB */
269 /* config for full 4GB range so that get_mem_size() works */
270 .cs_density = 32,
280 .refsel = 1, /* Refresh cycles at 32KHz */
284 /* DDR 32bit 512MB */
288 /* config for full 4GB range so that get_mem_size() works */
[all …]
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