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/openbmc/linux/arch/sh/lib/
H A Dudivsi3_i4i.S1 /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
23 Uses a lookup table for divisors in the range -128 .. +128, and
54 mov.l r4,@-r15
56 mov.l r1,@-r15
67 mov.l r4,@-r15
70 mov.l r5,@-r15
108 mov.l r4,@-r15
110 mov.l r1,@-r15
117 mov.l r1,@-r15
132 mov.l r4,@-r15
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/openbmc/u-boot/arch/sh/lib/
H A Dudivsi3_i4i.S1 /* SPDX-License-Identifier: GPL-2.0+ */
22 Uses a lookup table for divisors in the range -128 .. +128, and
53 mov.l r4,@-r15
55 mov.l r1,@-r15
66 mov.l r4,@-r15
69 mov.l r5,@-r15
107 mov.l r4,@-r15
109 mov.l r1,@-r15
116 mov.l r1,@-r15
130 mov.l r4,@-r15
[all …]
/openbmc/linux/arch/sparc/kernel/
H A Dvisemul.c1 // SPDX-License-Identifier: GPL-2.0
19 /* 000111011 - four 16-bit packs */
22 /* 000111010 - two 32-bit packs */
25 /* 000111101 - four 16-bit packs */
28 /* 001001101 - four 16-bit expands */
31 /* 001001011 - two 32-bit merges */
34 /* 000110001 - 8-by-16-bit partitioned product */
37 /* 000110011 - 8-by-16-bit upper alpha partitioned product */
40 /* 000110101 - 8-by-16-bit lower alpha partitioned product */
43 /* 000110110 - upper 8-by-16-bit partitioned product */
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/openbmc/u-boot/arch/x86/cpu/
H A Dstart16.S1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * U-Boot - x86 Startup Code
5 * (C) Copyright 2008-2011
13 #include <asm/processor-flags.h>
16 #define a32 .byte 0x67;
17 #define o32 .byte 0x66;
32 /* Turn off cache (this might require a 486-class CPU) */
51 /* Finally restore BIST and jump to the 32-bit initialization code */
57 /* 48-bit far pointer */
68 * 'Flat Protected Mode' - It will be discarded as soon as the final
[all …]
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * U-Boot - x86 Startup Code
5 * (C) Copyright 2008-2011
16 #include <asm/processor-flags.h>
17 #include <generated/generic-asm-offsets.h>
18 #include <generated/asm-offsets.h>
28 * This is the fail-safe 32-bit bootstrap entry point.
37 /* Turn off cache (this might require a 486-class CPU) */
43 /* Tell 32-bit code it is being entered from an in-RAM copy */
47 * Zero the BIST (Built-In Self Test) value since we don't have it.
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/openbmc/linux/fs/jfs/
H A Djfs_dtree.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) International Business Machines Corp., 2000-2002
9 * jfs_dtree.h: directory B+-tree manager
29 * N.B. last/only segment of entry is terminated by next = -1;
38 }; /* (32) */
43 #define DTSLOTSIZE 32
57 __le16 name[11]; /* 22: 2-byte aligned */
58 }; /* (32) */
70 * For legacy filesystems, name contains 13 wchars -- no index field
73 __le32 inumber; /* 4: 4-byte aligned */
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/openbmc/linux/arch/x86/crypto/
H A Dcamellia-aesni-avx2-asm_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * x86_64/AVX2/AES-NI assembler implementation of Camellia
51 32-way camellia
56 * x0..x7: byte-sliced AB state
60 * x0..x7: new byte-sliced CD state
65 * S-function with AES subbytes \
147 vpbroadcastq key, t0; /* higher 64-bit duplicate ignored */ \
159 /* P-function */ \
193 vpxor 5 * 32(mem_cd), x1, x1; \
200 vpxor 4 * 32(mem_cd), x0, x0; \
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H A Dsm4-aesni-avx2-asm_64.S1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SM4 Cipher Algorithm, AES-NI/AVX2 optimized.
5 * https://tools.ietf.org/id/draft-ribose-cfrg-sm4-10.html
7 * Copyright (C) 2018 Markku-Juhani O. Saarinen <mjos@iki.fi>
12 /* Based on SM4 AES-NI work by libgcrypt and Markku-Juhani O. Saarinen at:
61 /* Transpose four 32-bit words between 128-bit vector lanes. */
75 /* post-SubByte transform. */
85 /* post-SubByte transform. Note: x has been XOR'ed with mask4bit by
101 * Following four affine transform look-up tables are from work by
102 * Markku-Juhani O. Saarinen, at https://github.com/mjosaarinen/sm4ni
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/openbmc/linux/drivers/scsi/
H A Dmyrs.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * This driver supports the newer, SCSI-based firmware interface only.
10 * Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
109 } __packed mem_type:5; /* Byte 0 Bits 0-4 */
110 unsigned rsvd:1; /* Byte 0 Bit 5 */
111 unsigned mem_parity:1; /* Byte 0 Bit 6 */
112 unsigned mem_ecc:1; /* Byte 0 Bit 7 */
132 unsigned char rsvd1; /* Byte 0 */
137 } __packed bus; /* Byte 1 */
170 } __packed ctlr_type; /* Byte 2 */
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H A DBusLogic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com>
12 Special thanks to Wayne Yen, Jin-Lon Hon, and Alex Win of BusLogic, whose
160 (adapter->adapter_type == BLOGIC_MULTIMASTER)
163 (adapter->adapter_type == BLOGIC_FLASHPOINT)
189 BLOGIC_VESA_BUS, /* BT-4xx */
190 BLOGIC_ISA_BUS, /* BT-5xx */
191 BLOGIC_MCA_BUS, /* BT-6xx */
192 BLOGIC_EISA_BUS, /* BT-7xx */
193 BLOGIC_UNKNOWN_BUS, /* BT-8xx */
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/openbmc/linux/drivers/net/fddi/skfp/h/
H A Dskfbi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 * FDDI-Fx (x := {I(SA), P(CI)})
19 /*--------------------------------------------------------------------------*/
41 /* 0x0001 - 0x0003: reserved */
46 #define B0_ISRC 0x0008 /* 32 bit Interrupt source register */
47 #define B0_IMSK 0x000c /* 32 bit Interrupt mask register */
49 /* 0x0010 - 0x006b: formac+ (supernet_3) fequently used registers */
52 #define B0_ST1U 0x0010 /* read upper 16-bit of status reg 1 */
53 #define B0_ST1L 0x0014 /* read lower 16-bit of status reg 1 */
54 #define B0_ST2U 0x0018 /* read upper 16-bit of status reg 2 */
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/openbmc/linux/include/uapi/linux/
H A Dpsp-dbc.h1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
20 #define DBC_SIG_SIZE 32
24 * struct dbc_user_nonce - Nonce exchange structure (input/output).
27 * 1: authentication: PSP will return multi-use nonce.
28 * @nonce: 8 byte value used for future authentication (output).
29 * @signature: Optional 32 byte signature created by software using a
39 * struct dbc_user_setuid - UID exchange structure (input).
40 * @uid: 16 byte value representing software identity
41 * @signature: 32 byte signature created by software using a previous nonce
49 * struct dbc_user_param - Parameter exchange structure (input/output).
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/openbmc/linux/arch/mips/include/asm/octeon/
H A Dcvmx-fau.h7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
124 * - Step by 2 for 16 bit access.
125 * - Step by 4 for 32 bit access.
126 * - Step by 8 for 64 bit access.
141 * - 0 = Don't wait
142 * - 1 = Wait for tag switch to complete
144 * - Step by 2 for 16 bit access.
145 * - Step by 4 for 32 bit access.
[all …]
/openbmc/linux/arch/xtensa/lib/
H A Dchecksum.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
29 * This function assumes 2- or 4-byte alignment. Other alignments will fail!
32 /* ONES_ADD converts twos-complement math to ones-complement. */
44 * is aligned on either a 2-byte or 4-byte boundary.
48 bnez a5, 8f /* branch if 2-byte aligned */
49 /* Fall-through on common case, 4-byte alignment */
51 srli a5, a3, 5 /* 32-byte chunks */
57 add a5, a5, a2 /* a5 = end of last 32-byte chunk */
81 extui a5, a3, 2, 3 /* remaining 4-byte chunks */
87 add a5, a5, a2 /* a5 = end of last 4-byte chunk */
[all …]
/openbmc/linux/arch/powerpc/kernel/vdso/
H A Dsigtramp32.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Signal trampolines for 32 bits processes in a ppc64 kernel for
23 .Lsig_start = . - 4
42 .byte 0x0f; /* DW_CFA_def_cfa_expression */ \
43 .uleb128 9f - 1f; /* length */ \
45 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
46 .byte 0x06; /* DW_OP_deref */ \
47 .byte 0x23; .uleb128 RSIZE; /* DW_OP_plus_uconst */ \
48 .byte 0x06; /* DW_OP_deref */ \
54 .byte 0x10; /* DW_CFA_expression */ \
[all …]
/openbmc/qemu/target/i386/tcg/
H A Ddecode-new.h27 X86_TYPE_C, /* REG in the modrm byte selects a control register */
28 X86_TYPE_D, /* REG in the modrm byte selects a debug register */
31 X86_TYPE_G, /* REG in the modrm byte selects a GPR */
35 X86_TYPE_L, /* The upper 4 bits of the immediate select a 128-bit register */
36 X86_TYPE_M, /* modrm byte selects a memory operand */
37 X86_TYPE_N, /* R/M in the modrm byte selects an MMX register */
39 X86_TYPE_P, /* reg in the modrm byte selects an MMX register */
41 X86_TYPE_R, /* R/M in the modrm byte selects a register */
43 X86_TYPE_U, /* R/M in the modrm byte selects an XMM/YMM register */
44 X86_TYPE_V, /* reg in the modrm byte selects an XMM/YMM register */
[all …]
/openbmc/linux/lib/zstd/decompress/
H A Dzstd_decompress_block.c5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
14 /*-*******************************************************
50 /*-*************************************************************
63 bpPtr->lastBlock = cBlockHeader & 1; in ZSTD_getcBlockSize()
64 bpPtr->blockType = (blockType_e)((cBlockHeader >> 1) & 3); in ZSTD_getcBlockSize()
65 bpPtr->origSize = cSize; /* only useful for RLE */ in ZSTD_getcBlockSize()
66 if (bpPtr->blockType == bt_rle) return 1; in ZSTD_getcBlockSize()
67 RETURN_ERROR_IF(bpPtr->blockType == bt_reserved, corruption_detected, ""); in ZSTD_getcBlockSize()
79 dctx->litBuffer = (BYTE*)dst + ZSTD_BLOCKSIZE_MAX + WILDCOPY_OVERLENGTH; in ZSTD_allocateLiteralsBuffer()
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/openbmc/linux/arch/x86/kernel/cpu/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
60 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
61 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
62 { 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */
63 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
64 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
65 { 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */
66 { 0x0e, LVL_1_DATA, 24 }, /* 6-way set assoc, 64 byte line size */
67 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */
68 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
[all …]
/openbmc/linux/Documentation/core-api/
H A Dpacking.rst6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
44 perspective, bit 63 always means bit offset 7 of byte 7, albeit only
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/openbmc/libcper/include/libcper/
H A DBaseTypes.h6 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
19 /// 8-byte unsigned value
23 /// 8-byte signed value
27 /// 4-byte unsigned value
31 /// 4-byte signed value
35 /// 2-byte unsigned value
39 /// 2-byte Character. Unless otherwise specified all strings are stored in the
40 /// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 standards.
44 /// 2-byte signed value
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/openbmc/qemu/tests/tcg/x86_64/system/
H A Dboot.S7 * See the COPYING file in the top-level directory.
10 * which should drop us automatically into 32 bit mode ready to go. I've
13 * SPDX-License-Identifier: GPL-2.0-or-later
21 .long 2f - 1f /* namesz */ ; \
22 .long 4484f - 3f /* descsz */ ; \
57 * - `ebx`: contains the physical memory address where the loader has placed
59 * - `cr0`: bit 0 (PE) must be set. All the other writable bits are cleared.
60 * - `cr4`: all bits are cleared.
61 * - `cs `: must be a 32-bit read/execute code segment with a base of ‘0’
63 * - `ds`, `es`: must be a 32-bit read/write data segment with a base of
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/openbmc/linux/arch/x86/boot/
H A Dheader.S1 /* SPDX-License-Identifier: GPL-2.0 */
28 BOOTSEG = 0x07C0 /* original address of boot-sector */
45 # "MZ", MS-DOS header
70 .word section_table - optional_header # SizeOfOptionalHeader
78 .byte 0x02 # MajorLinkerVersion
79 .byte 0x14 # MinorLinkerVersion
83 .long ZO__end - ZO__data # SizeOfInitializedData
131 .long (section_table - .) / 8 # NumberOfRvaAndSizes
143 .byte 0
144 .byte 0
[all …]
/openbmc/linux/arch/x86/lib/
H A Dcopy_user_uncached_64.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2023 Linus Torvalds <torvalds@linux-foundation.org>
11 * copy_user_nocache - Uncached memory copy with exception handling
17 * Note: only 32-bit and 64-bit stores have non-temporal versions,
30 /* If destination is not 7-byte aligned, we'll have to align it */
48 30: movq 32(%rsi),%r8
50 32: movq 48(%rsi),%r10
52 40: movnti %r8,32(%rdi)
66 * just try the non-unrolled loop.
75 * done with 32 bytes stored to the destination,
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/openbmc/linux/tools/testing/selftests/powerpc/nx-gzip/include/
H A Dnxu.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Hardware interface of the NX-GZIP compression accelerator
41 #define nx_get_time() (-1)
42 #define nx_get_freq() (-1)
50 * https://github.com/libnxz/power-gzip/blob/develop/doc/power_nx_gzip_um.pdf
52 * adler/crc: 32 bit checksums appended to stream tail
63 * history: sliding window of up to 32KB of data
65 * rembytecnt: remaining byte count
67 * spbc: source processed byte count
69 * tebc: target ending bit count; valid bits in the last byte
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/openbmc/linux/Documentation/admin-guide/device-mapper/
H A Ddm-flakey.rst2 dm-flakey
13 Also, consider using this in combination with the dm-delay target too,
18 ----------------
28 Full pathname to the underlying block-device, or a
29 "major:minor" device-number.
59 The offset of the byte to replace.
60 Counting starts at 1, to replace the first byte.
65 The value (from 0-255) to write.
67 Perform the replacement only if bio->bi_opf has all the
71 During <down interval>, replace random byte in a read bio
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