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/openbmc/linux/arch/sparc/include/asm/
H A Dpcic.h1 /* SPDX-License-Identifier: GPL-2.0 */
50 #define PCI_DIAGNOSTIC_0 0x40 /* 32 bits */
51 #define PCI_SIZE_0 0x44 /* 32 bits */
52 #define PCI_SIZE_1 0x48 /* 32 bits */
53 #define PCI_SIZE_2 0x4c /* 32 bits */
54 #define PCI_SIZE_3 0x50 /* 32 bits */
55 #define PCI_SIZE_4 0x54 /* 32 bits */
56 #define PCI_SIZE_5 0x58 /* 32 bits */
57 #define PCI_PIO_CONTROL 0x60 /* 8 bits */
58 #define PCI_DVMA_CONTROL 0x62 /* 8 bits */
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/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
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/openbmc/linux/Documentation/filesystems/ext4/
H A Dgroup_descr.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------------------
30 block group descriptor was only 32 bytes long and therefore ends at
38 checksum is the lower 16 bits of the checksum of the FS UUID, the group
45 .. list-table::
47 :header-rows: 1
49 * - Offset
50 - Size
51 - Name
52 - Description
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/openbmc/linux/fs/hfs/
H A Dbitmap.c4 * Copyright (C) 1996-1997 Paul H. Hargrove
11 * search/set/clear bits.
20 * Given a block of memory, its length in bits, and a starting bit number,
21 * determine the number of the first zero bits (in left-to-right ordering)
24 * Returns >= 'size' if no zero bits are found in the range.
26 * Accesses memory in 32-bit aligned chunks of 32-bits and thus
40 curr = bitmap + (offset / 32); in hfs_find_set_zero_bits()
41 end = bitmap + ((size + 31) / 32); in hfs_find_set_zero_bits()
43 /* scan the first partial u32 for zero bits */ in hfs_find_set_zero_bits()
47 i = offset % 32; in hfs_find_set_zero_bits()
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/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2022-2023 Rivos Inc.
4 * Copyright © 2023 FORTH-ICS/CARV
5 * Copyright © 2023 RISC-V IOMMU Task Group
7 * RISC-V IOMMU - Register Layout and Data Structures.
10 * https://github.com/riscv-non-isa/riscv-iommu
19 #define GENMASK_ULL(h, l) (((~0ULL) >> (63 - (h) + (l))) << (l))
23 * struct riscv_iommu_fq_record - Fault/Event Queue Record
35 #define RISCV_IOMMU_FQ_HDR_PV BIT_ULL(32)
40 * struct riscv_iommu_pq_record - PCIe Page Request record
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/openbmc/linux/Documentation/staging/
H A Dcrc32.rst5 A CRC is a long-division remainder. You add the CRC to the message,
11 protocols put the end-of-frame flag after the CRC.
15 - We're working in binary, so the digits are only 0 and 1, and
16 - When dividing polynomials, there are no carries. Rather than add and
21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
22 Since it's 33 bits long, bit 32 is always going to be set, so usually the
24 familiar with the IEEE 754 floating-point format, it's the same idea.)
26 Note that a CRC is computed over a string of *bits*, so you have
27 to decide on the endianness of the bits within each byte. To get
28 the best error-detecting properties, this should correspond to the
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/openbmc/qemu/docs/devel/
H A Dloads-stores.rst12 documentation of each API -- for that you should look at the
32 - (empty) : for 32 or 64 bit sizes
33 - ``u`` : unsigned
34 - ``s`` : signed
37 - ``b`` : 8 bits
38 - ``w`` : 16 bits
39 - ``24`` : 24 bits
40 - ``l`` : 32 bits
41 - ``q`` : 64 bits
44 - ``he`` : host endian
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/openbmc/qemu/include/qemu/
H A Dbitops.h9 * See the COPYING.LIB file in the top-level directory.
16 #include "host-utils.h"
28 (((~0ULL) >> (64 - (length))) << (shift))
31 * DOC: Functions operating on arrays of bits
33 * We provide a set of functions which work on arbitrary-length arrays of
34 * bits. These come in several flavours which vary in what the type of the
35 * underlying storage for the bits is:
37 * - Bits stored in an array of 'unsigned long': set_bit(), clear_bit(), etc
38 * - Bits stored in an array of 'uint32_t': set_bit32(), clear_bit32(), etc
43 * be some guest-visible register view of the bit array.
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/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
5 cpu_opp_table: opp-table-cpu {
6 compatible = "operating-points-v2";
7 opp-shared;
9 opp-408000000 {
10 opp-hz = /bits/ 64 <408000000>;
11 opp-microvolt = <1000000 1000000 1310000>;
12 clock-latency-ns = <244144>; /* 8 32k periods */
15 opp-648000000 {
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H A Dsun50i-a64-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 cpu0_opp_table: opp-table-cpu {
8 compatible = "operating-points-v2";
9 opp-shared;
11 opp-648000000 {
12 opp-hz = /bits/ 64 <648000000>;
13 opp-microvolt = <1040000>;
14 clock-latency-ns = <244144>; /* 8 32k periods */
17 opp-816000000 {
18 opp-hz = /bits/ 64 <816000000>;
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H A Dsun50i-h6-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 cpu_opp_table: opp-table-cpu {
7 compatible = "allwinner,sun50i-h6-operating-points";
8 nvmem-cells = <&cpu_speed_grade>;
9 opp-shared;
11 opp-480000000 {
12 clock-latency-ns = <244144>; /* 8 32k periods */
13 opp-hz = /bits/ 64 <480000000>;
15 opp-microvolt-speed0 = <880000 880000 1200000>;
16 opp-microvolt-speed1 = <820000 820000 1200000>;
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/openbmc/qemu/target/s390x/tcg/
H A Dvec_int_helper.c2 * QEMU TCG support -- s390x vector integer instruction support
10 * See the COPYING file in the top-level directory.
15 #include "exec/helper-proto.h"
16 #include "tcg/tcg-gvec-desc.h"
21 return !v->doubleword[0] && !v->doubleword[1]; in s390_vec_is_zero()
27 res->doubleword[0] = a->doubleword[0] & b->doubleword[0]; in s390_vec_and()
28 res->doubleword[1] = a->doubleword[1] & b->doubleword[1]; in s390_vec_and()
33 return a->doubleword[0] == b->doubleword[0] && in s390_vec_equal()
34 a->doubleword[1] == b->doubleword[1]; in s390_vec_equal()
43 d->doubleword[0] = a->doubleword[0]; in s390_vec_shl()
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H A Dvec_helper.c2 * QEMU TCG support -- s390x vector support instructions
10 * See the COPYING file in the top-level directory.
14 #include "s390x-internal.h"
17 #include "tcg/tcg-gvec-desc.h"
18 #include "exec/helper-proto.h"
20 #include "exec/exec-all.h"
37 >> (7 - (bit_nr % 8))) & 1; in HELPER()
38 result |= (bit << (15 - i)); in HELPER()
68 #define DEF_VPK_HFN(BITS, TBITS) \ argument
69 typedef uint##TBITS##_t (*vpk##BITS##_fn)(uint##BITS##_t, int *); \
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/openbmc/linux/drivers/clocksource/
H A Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
50 int bits; member
54 * stm32_timer_of_bits_set - set accessor helper
56 * @bits: the number of bits (16 or 32)
58 * Accessor helper to set the number of bits in the timer-of private
62 static void stm32_timer_of_bits_set(struct timer_of *to, int bits) in stm32_timer_of_bits_set() argument
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
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/openbmc/linux/arch/parisc/include/asm/
H A Delf.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
29 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
30 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
60 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
61 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
62 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
63 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
64 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
65 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
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/openbmc/linux/include/uapi/linux/
H A Dvirtio_snd.h1 /* SPDX-License-Identifier: BSD-3-Clause */
110 /* 0 ... virtio_snd_config::jacks - 1 */
150 /* 0 ... virtio_snd_config::streams - 1 */
166 VIRTIO_SND_PCM_FMT_IMA_ADPCM = 0, /* 4 / 4 bits */
167 VIRTIO_SND_PCM_FMT_MU_LAW, /* 8 / 8 bits */
168 VIRTIO_SND_PCM_FMT_A_LAW, /* 8 / 8 bits */
169 VIRTIO_SND_PCM_FMT_S8, /* 8 / 8 bits */
170 VIRTIO_SND_PCM_FMT_U8, /* 8 / 8 bits */
171 VIRTIO_SND_PCM_FMT_S16, /* 16 / 16 bits */
172 VIRTIO_SND_PCM_FMT_U16, /* 16 / 16 bits */
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/openbmc/linux/tools/include/linux/
H A Dhash.h14 #if BITS_PER_LONG == 32
16 #define hash_long(val, bits) hash_32(val, bits) argument
18 #define hash_long(val, bits) hash_64(val, bits) argument
21 #error Wordsize not 32 or 64
26 * high bits. Since multiplication propagates changes to the most
27 * significant end only, it is essential that the high bits of the
31 * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf
34 * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
37 * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2,
51 * the arch-optimized versions with the generic.
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/openbmc/linux/include/linux/
H A Dhash.h14 #if BITS_PER_LONG == 32
16 #define hash_long(val, bits) hash_32(val, bits) argument
18 #define hash_long(val, bits) hash_64(val, bits) argument
21 #error Wordsize not 32 or 64
26 * high bits. Since multiplication propagates changes to the most
27 * significant end only, it is essential that the high bits of the
31 * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf
34 * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
37 * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2,
51 * the arch-optimized versions with the generic.
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/openbmc/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-jtag.c8 * Copyright (c) 2003-2008 Cavium Networks
15 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
36 #include <asm/octeon/cvmx-helper-jtag.h>
50 uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000); in cvmx_helper_qlm_jtag_init()
51 divisor = (divisor - 1) >> 2; in cvmx_helper_qlm_jtag_init()
74 * Write up to 32bits into the QLM jtag chain. Bits are shifted
76 * order bits followed by the high order bits. The JTAG chain is
77 * 4 * 268 bits long, or 1072.
80 * @bits: Number of bits to shift in (1-32).
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/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_qmath.c1 // SPDX-License-Identifier: ISC
10 * To fit the output into 16 bits the 32 bit multiplication result is right
11 * shifted by 16 bits.
20 * in 16 bits. To fit the multiplication result into 16 bits the multiplication
21 * result is right shifted by 15 bits. Right shifting 15 bits instead of 16 bits
38 * Description: This function add two 32 bit numbers and return the 32bit
39 * result. If the result overflow 32 bits, the output will be saturated to
40 * 32bits.
56 * result. If the result overflow 16 bits, the output will be saturated to
57 * 16bits.
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/openbmc/linux/drivers/video/fbdev/core/
H A Dsysfillrect.c21 * Aligned pattern fill using 32/64-bit memory accesses
26 unsigned long pat, unsigned n, int bits) in bitfill_aligned() argument
34 last = ~(FB_SHIFT_HIGH(p, ~0UL, (dst_idx+n) % bits)); in bitfill_aligned()
36 if (dst_idx+n <= bits) { in bitfill_aligned()
44 /* Leading bits */ in bitfill_aligned()
48 n -= bits - dst_idx; in bitfill_aligned()
52 n /= bits; in bitfill_aligned()
56 /* Trailing bits */ in bitfill_aligned()
64 * Unaligned generic pattern fill using 32/64-bit memory accesses
65 * The pattern must have been expanded to a full 32/64-bit value
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H A Dcfbfillrect.c4 * Copyright (C) 2000 James Simmons (jsimmons@linux-fbdev.org)
22 #if BITS_PER_LONG == 32
31 * Aligned pattern fill using 32/64-bit memory accesses
36 unsigned long pat, unsigned n, int bits, u32 bswapmask) in bitfill_aligned() argument
44 last = ~fb_shifted_pixels_mask_long(p, (dst_idx+n) % bits, bswapmask); in bitfill_aligned()
46 if (dst_idx+n <= bits) { in bitfill_aligned()
54 // Leading bits in bitfill_aligned()
58 n -= bits - dst_idx; in bitfill_aligned()
62 n /= bits; in bitfill_aligned()
72 n -= 8; in bitfill_aligned()
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/openbmc/qemu/include/
H A Delf.h4 /* 32-bit ELF base types. */
11 /* 64-bit ELF base types. */
47 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
48 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
49 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
50 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
51 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
81 #define EF_MIPS_MACH_SB1 0x008a0000 /* Broadcom SB-1 */
89 #define EF_MIPS_MACH_9000 0x00990000 /* PMC-Sierra RM9000 */
95 #define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (internal) */
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/openbmc/qemu/include/standard-headers/linux/
H A Dvirtio_snd.h1 /* SPDX-License-Identifier: BSD-3-Clause */
8 #include "standard-headers/linux/virtio_types.h"
11 * FEATURE BITS
132 /* 0 ... virtio_snd_config::jacks - 1 */
172 /* 0 ... virtio_snd_config::streams - 1 */
188 VIRTIO_SND_PCM_FMT_IMA_ADPCM = 0, /* 4 / 4 bits */
189 VIRTIO_SND_PCM_FMT_MU_LAW, /* 8 / 8 bits */
190 VIRTIO_SND_PCM_FMT_A_LAW, /* 8 / 8 bits */
191 VIRTIO_SND_PCM_FMT_S8, /* 8 / 8 bits */
192 VIRTIO_SND_PCM_FMT_U8, /* 8 / 8 bits */
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/openbmc/linux/Documentation/userspace-api/media/rc/
H A Drc-protos.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
22 Some remotes have a pointer-type device which can used to control the
29 rc-5 (RC_PROTO_RC5)
30 -------------------
32 This IR protocol uses manchester encoding to encode 14 bits. There is a
38 .. flat-table:: rc5 bits scancode mapping
41 * - rc-5 bit
43 - scancode bit
45 - description
47 * - 1
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