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/openbmc/linux/Documentation/networking/device_drivers/can/ctu/
H A Dfsm_txt_buffer_user.svg5 …72c-1.7455 2.37206-1.73544 5.61745-6e-7 8.03544z" fill="#28a4ff" fill-rule="evenodd" stroke="#28a4…
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23 …72c-1.7455 2.37206-1.73544 5.61745-6e-7 8.03544z" fill="#28a4ff" fill-rule="evenodd" stroke="#28a4…
41 …72c-1.7455 2.37206-1.73544 5.61745-6e-7 8.03544z" fill="#28a4ff" fill-rule="evenodd" stroke="#28a4…
77 <g transform="translate(-49.0277 -104.823)">
78 <g>
79 ….429h-71.1816v-17.5315" fill="none" marker-end="url(#marker2477)" stroke="#28a4ff" stroke-width=".…
80 ….959v-11.5914h-43.1215" fill="none" marker-end="url(#marker3037)" stroke="#28a4ff" stroke-width=".…
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/openbmc/linux/arch/x86/crypto/
H A Dsha512-avx2-asm.S91 g = %r10 define
146 h = g
147 g = f define
191 xor g, y2 # y2 = f^g # CH
194 and e, y2 # y2 = (f^g)&e # CH
201 rorx $28, a, T1 # T1 = (a >> 28) # S0
203 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
204 xor T1, y1 # y1 = (a>>39) ^ (a>>34) ^ (a>>28) # S0
254 xor g, y2 # y2 = f^g # CH
260 and e, y2 # y2 = (f^g)&e # CH
[all …]
H A Dsha512-avx-asm.S126 xor g_64, T1 # T1 = f ^ g
128 and e_64, T1 # T1 = (f ^ g) & e
130 xor g_64, T1 # T1 = ((f ^ g) & e) ^ g = CH(e,f,g)
136 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
138 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
151 RORQ tmp0, 28 # 28 # tmp = ((((a ror5)^a)ror6)^a)ror28 = S0(a)
217 RORQ tmp0, 28 # 28
264 RORQ tmp0, 28 # 28
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,lynx-28g.yaml4 $id: http://devicetree.org/schemas/phy/fsl,lynx-28g.yaml#
7 title: Freescale Lynx 28G SerDes PHY
15 - fsl,lynx-28g
36 compatible = "fsl,lynx-28g";
/openbmc/linux/include/dt-bindings/memory/
H A Dmt8195-memory-port.h13 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
16 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
21 * disp 0 ~ 4G larb0/1/2/3
22 * vcodec 4G ~ 8G larb19/20/21/22/23/24
23 * cam/mdp 8G ~ 12G the other larbs.
24 * N/A 12G ~ 16G
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
382 #define M4U_PORT_L28_CAM_YUVO_R1 MTK_M4U_ID(28, 0)
383 #define M4U_PORT_L28_CAM_YUVO_R3 MTK_M4U_ID(28, 1)
384 #define M4U_PORT_L28_CAM_YUVCO_R1 MTK_M4U_ID(28, 2)
[all …]
H A Dmt8186-memory-port.h15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
23 * disp 0 ~ 4G larb0/1/2
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
26 * N/A 12G ~ 16G
117 #define IOMMU_PORT_L9_IMG_RESERVE8 MTK_M4U_ID(9, 28)
148 #define IOMMU_PORT_L11_IMG_RESERVE8 MTK_M4U_ID(11, 28)
H A Dmediatek,mt8188-memory-port.h46 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
49 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
54 * disp 0 ~ 4G larb0/1/2/3
55 * vcodec 4G ~ 8G larb19(21)[1]/21(22)/23
56 * cam/mdp 8G ~ 12G the other larbs.
57 * N/A 12G ~ 16G
211 #define M4U_PORT_L11A_SMTO_T6_C MTK_M4U_ID(SMI_L11A_ID, 28)
243 #define M4U_PORT_L11B_SMTO_T6_C MTK_M4U_ID(SMI_L11B_ID, 28)
275 #define M4U_PORT_L11C_SMTO_T6_C MTK_M4U_ID(SMI_L11C_ID, 28)
483 /* LARB 28 -- AXI-CCU */
/openbmc/linux/tools/testing/selftests/net/forwarding/
H A Drouter_multicast.sh7 # | 198.51.100.2/28 |
14 # | 198.51.100.1/28 |
18 # | 198.51.100.17/28 198.51.100.33/28 |
26 # | 198.51.100.18/28 | | 198.51.100.34/28 |
42 simple_if_init $h1 198.51.100.2/28 2001:db8:1::2/64
44 ip route add 198.51.100.16/28 vrf v$h1 nexthop via 198.51.100.1
45 ip route add 198.51.100.32/28 vrf v$h1 nexthop via 198.51.100.1
60 ip route del 198.51.100.32/28 vrf v$h1
61 ip route del 198.51.100.16/28 vrf v$h1
63 simple_if_fini $h1 198.51.100.2/28 2001:db8:1::2/64
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/openbmc/openbmc/poky/documentation/overview-manual/svg/
H A Dgit-workflow.svg487 <g
492 <g
495 <g
499 <g
504 <g
509 <g
512 <g
520 </g>
521 <g
52728,9 -44,15 -33,11 -71,25 -115,40 -43,15 -91,32 -144,51 -209,75 -481,173 -753,274 -271,101 -542,20…
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/openbmc/linux/drivers/phy/freescale/
H A DKconfig41 tristate "Freescale Layerscape Lynx 28G SerDes PHY support"
46 Enable this to add support for the Lynx SerDes 28G PHY as
/openbmc/openbmc/poky/documentation/template/
H A Dtemplate.svg511 <g
516 <g
520 <g
525 <g
530 <g
533 <g
541 </g>
542 <g
54828,9 -44,15 -33,11 -71,25 -115,40 -43,15 -91,32 -144,51 -209,75 -481,173 -753,274 -271,101 -542,20…
550 </g>
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/openbmc/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_regs.h35 #define AFI_PORT_FRM_OUT(g) __REG(TARGET_AFI, 0, 1, 98816, g, 10, 8, 0, 0, 1, 4) argument
44 #define AFI_PORT_CFG(g) __REG(TARGET_AFI, 0, 1, 98816, g, 10, 8, 4, 0, 1, 4) argument
161 #define ANA_PGID(g) __REG(TARGET_ANA, 0, 1, 27648, g, 89, 8, 0, 0, 1, 4) argument
170 #define ANA_PGID_CFG(g) __REG(TARGET_ANA, 0, 1, 27648, g, 89, 8, 4, 0, 1, 4) argument
272 #define ANA_VLAN_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 0, 0, 1, 4) argument
305 #define ANA_DROP_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 4, 0, 1, 4) argument
332 #define ANA_QOS_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 8, 0, 1, 4) argument
365 #define ANA_VCAP_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 12, 0, 1, 4) argument
374 #define ANA_VCAP_S1_CFG(g, r) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 16, r, 3, 4) argument
401 #define ANA_VCAP_S2_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 28, 0, 1, 4) argument
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dtable.c2898 "FCC", "2.4G", "20M", "CCK", "1T", "01", "36",
2899 "ETSI", "2.4G", "20M", "CCK", "1T", "01", "32",
2900 "MKK", "2.4G", "20M", "CCK", "1T", "01", "32",
2901 "FCC", "2.4G", "20M", "CCK", "1T", "02", "36",
2902 "ETSI", "2.4G", "20M", "CCK", "1T", "02", "32",
2903 "MKK", "2.4G", "20M", "CCK", "1T", "02", "32",
2904 "FCC", "2.4G", "20M", "CCK", "1T", "03", "36",
2905 "ETSI", "2.4G", "20M", "CCK", "1T", "03", "32",
2906 "MKK", "2.4G", "20M", "CCK", "1T", "03", "32",
2907 "FCC", "2.4G", "20M", "CCK", "1T", "04", "36",
[all …]
/openbmc/u-boot/doc/uImage.FIT/
H A Dsignature.txt49 openssl on the host side (e.g. mkimage), it is not desirable for U-Boot.
88 - algo: Algorithm name (e.g. "sha1,rsa2048")
97 - value: The signature data (e.g. 256 bytes for 2048-bit RSA)
103 - signer-name: Name of the signer (e.g. "mkimage")
105 - signer-version: Version string of the signer (e.g. "2013.01")
145 - algo: Algorithm name (e.g. "sha1,rsa2048")
164 - rsa,num-bits: Number of key bits (e.g. 2048)
487 …ed;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29
497 …315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%29
511 …d;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29"
[all …]
/openbmc/qemu/docs/system/i386/
H A Dsgx.rst31 memory types, e.g. hugetlbfs, EPC is exposed as a memory backend.
39 guest, e.g. QEMU will happily allow you to create 64 1M EPC sections. Be aware
40 that some kernels may not recognize all EPC sections, e.g. the Linux SGX driver
44 to the VM and an additional 28M mapped but not allocated::
47 -object memory-backend-epc,id=mem2,size=28M \
55 a subset of the full EPC, e.g. 92M or 128M) and the EPC must be naturally
59 To simplify the implementation, EPC is always located above 4g in the guest
82 e.g. via ``-cpu <model>,+sgx`` or ``-cpu <model>,+sgx,+sgxlc``.
84 All SGX sub-features enumerated through CPUID, e.g. SGX2, MISCSELECT,
88 controlled via -cpu are prefixed with "sgx", e.g.::
[all …]
/openbmc/openbmc/poky/meta/recipes-graphics/xorg-app/xinit/
H A D0001-Make-manpage-multilib-identical.patch3 Date: Fri, 6 Mar 2020 22:28:14 +0000
17 @@ -12,7 +12,7 @@ MAN_SUBSTS+= -e 's|__XSERVERNAME__|$(XSERVERNAME)|g' \
18 -e 's|__XCONFIGFILEMAN__|$(XCONFIGFILEMAN)|g' \
19 -e 's|__xinitdir__|$(XINITDIR)|g' \
20 -e 's|__bindir__|$(bindir)|g' \
21 - -e 's|__libdir__|$(libdir)|g' \
22 + -e 's|__libdir__|$(prefix)/lib*|g' \
23 -e 's|__configdir__|$(XINITDIR)|g'
/openbmc/linux/drivers/gpu/drm/msm/
H A DKconfig77 using e.g. APQ8016/MSM8916/APQ8096/MSM8996/MSM8974/SDM6x0 platforms.
87 using e.g. SDM845 and newer platforms.
110 bool "Enable DSI 28nm PHY driver in MSM DRM"
114 Choose this option if the 28nm DSI PHY is used on the platform.
124 bool "Enable DSI 28nm 8960 PHY driver in MSM DRM"
128 Choose this option if the 28nm DSI PHY 8960 variant is used on the
/openbmc/linux/Documentation/hwmon/
H A Dlm73.rst44 0.125 28 15..28
60 28
84 g(x) = 0.250 * [log(x/14) / log(2)]
86 where 'x' is the output from 'update_interval' and 'g(x)' is the
/openbmc/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_main_regs.h87 #define ANA_AC_SRC_CFG(g) __REG(TARGET_ANA_AC,\ argument
88 0, 1, 849920, g, 102, 16, 0, 0, 1, 4)
91 #define ANA_AC_SRC_CFG1(g) __REG(TARGET_ANA_AC,\ argument
92 0, 1, 849920, g, 102, 16, 4, 0, 1, 4)
95 #define ANA_AC_SRC_CFG2(g) __REG(TARGET_ANA_AC,\ argument
96 0, 1, 849920, g, 102, 16, 8, 0, 1, 4)
105 #define ANA_AC_PGID_CFG(g) __REG(TARGET_ANA_AC,\ argument
106 0, 1, 786432, g, 3290, 16, 0, 0, 1, 4)
109 #define ANA_AC_PGID_CFG1(g) __REG(TARGET_ANA_AC,\ argument
110 0, 1, 786432, g, 3290, 16, 4, 0, 1, 4)
[all …]
/openbmc/linux/crypto/
H A Dsm3.c38 #define R(i, a, b, c, d, e, f, g, h, t, w1, w2) \ argument
43 h += GG ## i(e, f, g) + ss1 + (w1); \
49 #define R1(a, b, c, d, e, f, g, h, t, w1, w2) \ argument
50 R(1, a, b, c, d, e, f, g, h, t, w1, w2)
51 #define R2(a, b, c, d, e, f, g, h, t, w1, w2) \ argument
52 R(2, a, b, c, d, e, f, g, h, t, w1, w2)
74 u32 a, b, c, d, e, f, g, h, ss1, ss2; in sm3_transform() local
82 g = sctx->state[6]; in sm3_transform()
85 R1(a, b, c, d, e, f, g, h, K[0], I(0), I(4)); in sm3_transform()
86 R1(d, a, b, c, h, e, f, g, K[1], I(1), I(5)); in sm3_transform()
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D02683 for errno in 5 28; do
96 _make_test_img 1G
141 for errno in 28; do
154 _make_test_img 1G
181 for errno in 5 28; do
193 _make_test_img 1G
/openbmc/u-boot/lib/
H A Dsha256.c62 uint32_t A, B, C, D, E, F, G, H; in sha256_process() local
71 GET_UINT32_BE(W[7], data, 28); in sha256_process()
99 #define P(a,b,c,d,e,f,g,h,x,K) { \ in sha256_process() argument
100 temp1 = h + S3(e) + F1(e,f,g) + K + x; \ in sha256_process()
111 G = ctx->state[6]; in sha256_process()
114 P(A, B, C, D, E, F, G, H, W[0], 0x428A2F98); in sha256_process()
115 P(H, A, B, C, D, E, F, G, W[1], 0x71374491); in sha256_process()
116 P(G, H, A, B, C, D, E, F, W[2], 0xB5C0FBCF); in sha256_process()
117 P(F, G, H, A, B, C, D, E, W[3], 0xE9B5DBA5); in sha256_process()
118 P(E, F, G, H, A, B, C, D, W[4], 0x3956C25B); in sha256_process()
[all …]
/openbmc/qemu/target/s390x/tcg/
H A Dinsn-format.h.inc20 for e.g. RX. Our checking requires this for e.g. BCR. */
23 F2(RRE, R(1,24), R(2,28))
24 F3(RRD, R(1,16), R(2,28), R(3,24))
25 F4(RRF_a, R(1,24), R(2,28), R(3,16), M(4,20))
26 F4(RRF_b, R(1,24), R(2,28), R(3,16), M(4,20))
27 F4(RRF_c, R(1,24), R(2,28), M(3,16), M(4,20))
28 F4(RRF_d, R(1,24), R(2,28), M(3,16), M(4,20))
29 F4(RRF_e, R(1,24), R(2,28), M(3,16), M(4,20))
61 F5(VRI_e, V(1,8), V(2,12), I(3,16,12), M(5,28), M(4,32))
62 F5(VRI_f, V(1,8), V(2,12), V(3,16), M(5,24), I(4,28,8))
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/lvm2/files/
H A D0001-include-libgen.h-for-basename.patch3 Date: Mon, 25 Mar 2024 13:07:28 -0700
7 compilers e.g. clang-18 flags the absense of prototype as error. therefore
22 @@ -28,6 +28,7 @@
/openbmc/linux/drivers/gpu/drm/exynos/
H A Dregs-gsc.h7 * Register definition file for Samsung G-Scaler driver
13 /* G-Scaler enable */
33 /* G-Scaler S/W reset */
37 /* G-Scaler IRQ */
45 /* G-Scaler input control */
91 /* G-Scaler source image size */
98 /* G-Scaler source image offset */
105 /* G-Scaler cropped source image size */
112 /* G-Scaler output control */
148 /* G-Scaler scaled destination image size */
[all …]

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