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/openbmc/linux/arch/arm/boot/dts/realtek/
H A Drtd1195.dtsi78 clock-frequency = <27000000>;
83 clock-frequency = <27000000>;
202 clock-frequency = <27000000>;
214 clock-frequency = <27000000>;
/openbmc/u-boot/board/boundary/nitrogen6x/
H A D6x_upgrade.txt7 sf probe 1 27000000 || sf probe 1 27000000 ; then
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-s/
H A DAmazonas-61.0W104 SYMBOL_RATE = 27000000
112 SYMBOL_RATE = 27000000
/openbmc/linux/drivers/media/tuners/
H A Dfc001x-common.h12 FC_XTAL_27_MHZ, /* 27000000 */
/openbmc/linux/drivers/clk/qcom/
H A Dlcc-msm8960.c72 { 27000000, P_PXO, 1, 0, 0 },
88 { 27000000, P_PXO, 1, 0, 0 },
234 { 27000000, P_PXO, 1, 0, 0 },
251 { 27000000, P_PXO, 1, 0, 0 },
/openbmc/linux/drivers/media/test-drivers/vidtv/
H A Dvidtv_common.h16 #define CLOCK_UNIT_27MHZ 27000000
/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c53 pll_refclk = 27000000u; in decode_frac_pll()
55 pll_refclk = 27000000u; in decode_frac_pll()
213 pll_refclk = 27000000u; in decode_sscg_pll()
215 pll_refclk = 27000000u; in decode_sscg_pll()
253 return 27000000; in get_root_src_clk()
/openbmc/linux/arch/arm64/boot/dts/realtek/
H A Drtd139x.dtsi45 clock-frequency = <27000000>;
167 clock-frequency = <27000000>;
H A Drtd129x.dtsi46 clock-frequency = <27000000>;
169 clock-frequency = <27000000>;
H A Drtd16xx.dtsi125 clock-frequency = <27000000>;
208 clock-frequency = <27000000>;
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Daxs10x-i2s-pll-clock.txt16 clock-frequency = <27000000>;
H A Dsunplus,sp7021-clkc.yaml39 clock-frequency = <27000000>;
H A Dmaxim,max9485.txt37 clock-frequency = <27000000>;
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dversatile-ab-ib2.dts13 syscon@27000000 {
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dbrcm,bcm7038-wdt.yaml30 default to 27000000 Hz.
/openbmc/linux/drivers/media/dvb-frontends/
H A Dsi2165.h36 * possible values: 4000000, 16000000, 20000000, 240000000, 27000000
/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-clk-ccf.dtsi24 clock-frequency = <27000000>;
45 clock-frequency = <27000000>;
H A Dzynqmp-sck-kv-g-revB.dtso53 clock-frequency = <27000000>;
83 assigned-clock-rates = <27000000>, <25000000>, <300000000>;
/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dmt9v032.txt38 <13000000 26600000 27000000>;
/openbmc/linux/drivers/gpu/drm/sun4i/
H A Dsun8i_hdmi_phy.c109 { 27000000, { 0x0012, 0x0000, 0x0000 }, },
119 { 27000000, 0x8009, 0x0007, 0x02b0 },
170 if (clk_rate <= 27000000) { in sun8i_a83t_hdmi_phy_config()
297 if (clk_rate <= 27000000) { in sun8i_h3_hdmi_phy_config()
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-clk-ccf.dtsi46 clock-frequency = <27000000>;
67 clock-frequency = <27000000>;
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-venice-gw74xx-rpidsi.dtso42 samsung,pll-clock-frequency = <27000000>;
H A Dimx8mm-venice-gw72xx-0x-rpidsi.dtso46 samsung,pll-clock-frequency = <27000000>;
H A Dimx8mm-venice-gw73xx-0x-rpidsi.dtso46 samsung,pll-clock-frequency = <27000000>;
/openbmc/linux/include/media/i2c/
H A Dtvp514x.h24 #define TVP514X_XCLK_BT656 (27000000)

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