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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dmicrochip,sparx5-serdes.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
21 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
22 * Adjustable tx de-emphasis (FFE)
31 The SERDES6G is a high-speed SERDES interface, which can operate at
34 * 100 Mbps (100BASE-FX)
35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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H A Dtransmit-amplitude.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Binding describing the peak-to-peak transmit amplitude for common PHYs
14 - Marek Behún <kabel@kernel.org>
17 tx-p2p-microvolt:
19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property
21 'tx-p2p-microvolt-names' property must be provided and contain
24 tx-p2p-microvolt-names:
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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
20 local-mac-address:
23 $ref: /schemas/types.yaml#/definitions/uint8-array
27 mac-address:
32 local-mac-address property.
33 $ref: /schemas/types.yaml#/definitions/uint8-array
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
30 - Cryptography acceleration (SEC)
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/openbmc/linux/include/linux/
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2006-2009 Solarflare Communications Inc.
38 /* Bus address of the MDIO device (0-31) */
71 * up device-specific structures, if any
92 dev_set_drvdata(&mdio->dev, data); in mdiodev_set_drvdata()
97 return dev_get_drvdata(&mdio->dev); in mdiodev_get_drvdata()
111 get_device(&mdiodev->dev); in mdio_device_get()
135 * struct mdio_if_info - Ethernet controller MDIO interface
138 * non-zero unless @prtad = %MDIO_PRTAD_NONE.
160 #define MDIO_PRTAD_NONE (-1)
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H A Dphy.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
79 * Set phydev->irq to PHY_POLL if interrupts are not supported,
83 #define PHY_POLL -1
84 #define PHY_MAC_INTERRUPT -2
93 * enum phy_interface_t - Interface Mode definitions
95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
97 * @PHY_INTERFACE_MODE_MII: Media-independent interface
98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
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/openbmc/linux/drivers/net/ethernet/freescale/fman/
H A Dfman_memac.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
3 * Copyright 2008 - 2015 Freescale Semiconductor Inc.
14 #include <linux/pcs-lynx.h>
31 #define CMD_CFG_CRC_FWD 0x00000040 /* 25 Terminate/frwd CRC of frames */
56 #define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */
57 #define IF_MODE_10G 0x00000000 /* 30-31 10G interface */
58 #define IF_MODE_MII 0x00000001 /* 30-31 MII interface */
59 #define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
62 #define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
63 #define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
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/openbmc/u-boot/board/freescale/t4qds/
H A Deth.c1 // SPDX-License-Identifier: GPL-2.0+
111 struct t4240qds_mdio *priv = bus->priv; in t4240qds_mdio_read()
113 t4240qds_mux_mdio(priv->muxval); in t4240qds_mdio_read()
115 return priv->realbus->read(priv->realbus, addr, devad, regnum); in t4240qds_mdio_read()
121 struct t4240qds_mdio *priv = bus->priv; in t4240qds_mdio_write()
123 t4240qds_mux_mdio(priv->muxval); in t4240qds_mdio_write()
125 return priv->realbus->write(priv->realbus, addr, devad, regnum, value); in t4240qds_mdio_write()
130 struct t4240qds_mdio *priv = bus->priv; in t4240qds_mdio_reset()
132 return priv->realbus->reset(priv->realbus); in t4240qds_mdio_reset()
142 return -1; in t4240qds_mdio_init()
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/openbmc/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_hsi.h3 * Copyright (c) 2007-2013 Broadcom Corporation
125 /* Up to 16 bytes of NULL-terminated string */
145 (if multiple found, priority order is: NC-SI, UMP, IPMI) */
150 /* Use SPIO4 as an arbiter between: 0-NC_SI, 1-IPMI
151 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
153 /* Use SPIO4 as an arbiter between: 0-UMP, 1-IPMI
154 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
156 /* Use SPIO4 as an arbiter between: 0-NC-SI, 1-UMP
157 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
409 /* Default values: 2P-64, 4P-32 */
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