/openbmc/linux/arch/powerpc/crypto/ |
H A D | aes-gcm-p10.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 # Accelerated AES-GCM stitched implementation for ppc64le. 5 # Copyright 2022- IBM Inc. All rights reserved 22 # Hash keys = v3 - v14 29 # v31 - counter 1 32 # vs0 - vs14 for round keys 35 # This implementation uses stitched AES-GCM approach to improve overall performance. 48 # v15 - v18 - input states 49 # vs1 - vs9 - round keys 102 xxlor 23+32, 9, 9 [all …]
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H A D | chacha-p10le-8x.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 # Copyright 2023- IBM Corp. All rights reserved 43 #include <asm/asm-offsets.h> 44 #include <asm/asm-compat.h> 81 stdu 1,-752(1) 93 SAVE_GPR 24, 192, 1 102 addi 9, 1, 256 103 SAVE_VRS 20, 0, 9 104 SAVE_VRS 21, 16, 9 105 SAVE_VRS 22, 32, 9 [all …]
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H A D | poly1305-p10le_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 # Copyright 2023- IBM Corp. All rights reserved 10 # Poly1305 - this version mainly using vector/VSX/Scalar 11 # - 26 bits limbs 12 # - Handle multiple 64 byte blcok. 17 # p = 2^130 - 5 25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, … 26 # to 9 vectors for multiplications. 56 #include <asm/asm-offsets.h> 57 #include <asm/asm-compat.h> [all …]
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/openbmc/u-boot/lib/zlib/ |
H A D | trees.h | 1 /* header created automatically with -DGEN_TREES_H */ 23 {{241},{ 8}}, {{ 9},{ 8}}, {{137},{ 8}}, {{ 73},{ 8}}, {{201},{ 8}}, 32 {{ 61},{ 8}}, {{189},{ 8}}, {{125},{ 8}}, {{253},{ 8}}, {{ 19},{ 9}}, 33 {{275},{ 9}}, {{147},{ 9}}, {{403},{ 9}}, {{ 83},{ 9}}, {{339},{ 9}}, 34 {{211},{ 9}}, {{467},{ 9}}, {{ 51},{ 9}}, {{307},{ 9}}, {{179},{ 9}}, 35 {{435},{ 9}}, {{115},{ 9}}, {{371},{ 9}}, {{243},{ 9}}, {{499},{ 9}}, 36 {{ 11},{ 9}}, {{267},{ 9}}, {{139},{ 9}}, {{395},{ 9}}, {{ 75},{ 9}}, 37 {{331},{ 9}}, {{203},{ 9}}, {{459},{ 9}}, {{ 43},{ 9}}, {{299},{ 9}}, 38 {{171},{ 9}}, {{427},{ 9}}, {{107},{ 9}}, {{363},{ 9}}, {{235},{ 9}}, 39 {{491},{ 9}}, {{ 27},{ 9}}, {{283},{ 9}}, {{155},{ 9}}, {{411},{ 9}}, [all …]
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-mt8195-apmixedsys.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> 6 #include "clk-fhctl.h" 7 #include "clk-gate.h" 8 #include "clk-mtk.h" 9 #include "clk-pll.h" 10 #include "clk-pllfh.h" 12 #include <dt-bindings/clock/mt8195-clk.h> 63 0, 0, 22, 0x0398, 24, 0, 0, 0, 0x0398, 0, 0x0398, 0, 9), 65 0, 0, 22, 0x0198, 24, 0, 0, 0, 0x0198, 0, 0x0198, 0, 9), [all …]
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H A D | clk-mt8188-apmixedsys.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 11 #include "clk-gate.h" 12 #include "clk-mtk.h" 13 #include "clk-pll.h" 62 0, 0, 22, 0x0450, 24, 0, 0, 0, 0x0450, 0, 0, 0, 9), 64 0, 0, 22, 0x0518, 24, 0, 0, 0, 0x0518, 0, 0, 0, 9), 66 0, 0, 22, 0x0528, 24, 0, 0, 0, 0x0528, 0, 0, 0, 9), 68 0, 0, 22, 0x0538, 24, 0, 0, 0, 0x0538, 0, 0, 0, 9), 70 HAVE_RST_BAR, BIT(23), 22, 0x0548, 24, 0, 0, 0, 0x0548, 0, 0, 0, 9), [all …]
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/openbmc/linux/include/dt-bindings/memory/ |
H A D | mt8195-memory-port.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 9 #include <dt-bindings/memory/mtk-memory-port.h> 20 * modules dma-address-region larbs-ports 22 * vcodec 4G ~ 8G larb19/20/21/22/23/24 29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28 30 * iommu-vpp: larb1/3/4/6/8/12/14/16/18/20/22/23/26/27 100 #define M4U_PORT_L9_IMG_IMGI_T1_A MTK_M4U_ID(9, 0) 101 #define M4U_PORT_L9_IMG_IMGBI_T1_A MTK_M4U_ID(9, 1) 102 #define M4U_PORT_L9_IMG_IMGCI_T1_A MTK_M4U_ID(9, 2) 103 #define M4U_PORT_L9_IMG_SMTI_T1_A MTK_M4U_ID(9, 3) [all …]
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/openbmc/linux/arch/alpha/kernel/ |
H A D | entry.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Kernel entry-points. 8 #include <asm/asm-offsets.h> 28 .cfi_rel_offset $16, 24 35 .size \func, . - \func 39 * This defines the normal kernel pt-regs layout. 41 * regs 9-15 preserved by C code 42 * regs 16-18 saved by PAL-code 43 * regs 29-30 saved and set up by PAL-code 44 * JRP - Save regs 16-18 in a special area of the stack, so that [all …]
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/openbmc/linux/arch/arm64/tools/ |
H A D | sysreg | 1 # SPDX-License-Identifier: GPL-2.0-only 44 # NI - Not implemented 45 # IMP - Implemented 75 Res0 25:24 113 UnsignedEnum 27:24 DIT 154 UnsignedEnum 27:24 Virt_frac 193 UnsignedEnum 27:24 PerfMon 252 UnsignedEnum 27:24 FCSE 301 Enum 27:24 L1TstCln 347 Enum 27:24 WFIStall [all …]
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/openbmc/linux/Documentation/translations/zh_CN/core-api/ |
H A D | packing.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 3 .. include:: ../disclaimer-zh_CN.rst 5 :Original: Documentation/core-api/packing.rst 22 -------- 42 -------- 46 - 将一个CPU可使用的数字打包到内存缓冲区中(具有硬件约束/特殊性)。 47 - 将内存缓冲区(具有硬件约束/特殊性)解压缩为一个CPU可使用的数字。 63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 77 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 89 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 [all …]
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/openbmc/linux/arch/arm/mach-omap1/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * linux/arch/arm/mach-omap1/mux.c 7 * Copyright (C) 2003 - 2008 Nokia Corporation 15 #include <linux/soc/ti/omap1-io.h> 30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0) 31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0) 37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0) 42 MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0) 44 MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0) 53 MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1) [all …]
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/libsdl/libsdl-1.2.15/ |
H A D | CVE-2019-7637.patch | 4 # Sat Mar 16 19:16:24 2019 -0700 5 # Branch SDL-1.2 6 # Node ID 9b0e5c555c0f5ce6d2c3c19da6cc2c7fb5048bf2 8 CVE-2019-7637: Fix in integer overflow in SDL_CalculatePitch 18 This can be reproduced with "./graywin -width 21312312313123213213213" 23 back as a special 0 value. We assume that 0-width surfaces do not 27 CVE-2019-7637 30 Signed-off-by: Petr Písař <ppisar@redhat.com> 32 CVE: CVE-2019-7637 33 Upstream-Status: Backport [all …]
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/openbmc/linux/drivers/gpu/drm/display/ |
H A D | drm_dsc_helper.c | 1 // SPDX-License-Identifier: MIT 34 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header 48 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init() 49 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init() 54 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes 56 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h 81 * drm_dsc_pps_payload_pack() - Populates the DSC PPS 109 pps_payload->dsc_version = in drm_dsc_pps_payload_pack() 110 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack() 111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack() [all …]
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/openbmc/linux/arch/arm/mach-omap2/ |
H A D | cm-regbits-54xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com 9 * Benoit Cousson (b-cousson@ti.com) 13 * with the public linux-omap@vger.kernel.org mailing list and the 15 * up-to-date with the file contents. 23 #define OMAP54XX_CLKSEL_SHIFT 24 27 #define OMAP54XX_CLKSEL_AESS_FCLK_SHIFT 24 31 #define OMAP54XX_CLKSEL_FCLK_SHIFT 24 33 #define OMAP54XX_CLKSEL_GPU_CORE_GCLK_SHIFT 24 41 #define OMAP54XX_CLKSEL_SOURCE_SHIFT 24 [all …]
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/openbmc/linux/arch/arm/probes/kprobes/ |
H A D | test-arm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * arch/arm/kernel/kprobes-test-arm.c 14 #include "test-core.h" 55 TEST_GROUP("Data-processing (register), (register-shifted register), (immediate)") in kprobe_arm_test_cases() 69 TEST_RRR( op s "hi r8, r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")\ in kprobe_arm_test_cases() 70 TEST_RRR( op s "ls r9, r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")\ in kprobe_arm_test_cases() 96 TEST_RRR( op "ls r",9, VAL1,", r",14,val, ", lsl r",0, 3,"") \ in kprobe_arm_test_cases() 97 TEST_RRR( op "hi r",9, VAL1,", r",14,val, ", lsr r",7, 4,"") \ in kprobe_arm_test_cases() 117 TEST_RR( op s "hi r9, r",9, val, ", lsr r",7, 4,"") \ in kprobe_arm_test_cases() 118 TEST_RR( op s "ls r10, r",9, val, ", asr r",7, 5,"") \ in kprobe_arm_test_cases() [all …]
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H A D | test-thumb.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * arch/arm/probes/kprobes/test-thumb.c 13 #include "test-core.h" 89 TEST_GROUP("16-bit Thumb data-processing instructions") in kprobe_thumb16_test_cases() 118 TEST_R( "add sp" ", r",8,-8, "") in kprobe_thumb16_test_cases() 120 TEST_BF_R("add pc" ", r",0,2f-1f-8,"") in kprobe_thumb16_test_cases() 125 TEST_R( "cmp sp" ", r",8,-8, "") in kprobe_thumb16_test_cases() 130 TEST_P( "mov sp, r",8,-8, "") in kprobe_thumb16_test_cases() 164 TEST_GROUP("16-bit Thumb Load/store instructions") in kprobe_thumb16_test_cases() 166 TEST_RPR("str r",0, VAL1,", [r",1, 24,", r",2, 48,"]") in kprobe_thumb16_test_cases() [all …]
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/openbmc/linux/drivers/net/wireless/mediatek/mt76/ |
H A D | mt76_connac2_mac.h | 1 /* SPDX-License-Identifier: ISC */ 35 #define MT_TX_FREE_MSDU_CNT GENMASK(9, 0) 46 #define MT_TXD0_PKT_FMT GENMASK(24, 23) 52 #define MT_TXD1_OWN_MAC GENMASK(29, 24) 60 #define MT_TXD1_WLAN_IDX GENMASK(9, 0) 64 #define MT_TXD2_POWER_OFFSET GENMASK(29, 24) 71 #define MT_TXD2_RTS BIT(9) 98 #define MT_TXD5_TX_STATUS_MCU BIT(9) 123 #define MT_TXD7_TX_TIME GENMASK(9, 0) 130 #define MT_TX_RATE_MODE GENMASK(9, 6) [all …]
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H A D | mt76_connac3_mac.h | 1 /* SPDX-License-Identifier: ISC */ 32 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 47 #define MT_RXD1_NORMAL_CLM BIT(24) 64 #define MT_RXD2_NORMAL_MAX_LEN_ERROR BIT(24) 82 #define MT_RXD3_NORMAL_FCS_ERR BIT(24) 91 #define MT_RXV_HDR_BAND_IDX BIT(24) 101 /* P-RXV */ 109 #define MT_PRXV_RCPI3 GENMASK(31, 24) 114 #define MT_PRXV_HT_STBC GENMASK(10, 9) 119 /* C-RXV */ [all …]
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/openbmc/linux/arch/arm/mach-davinci/ |
H A D | da830.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/clk-provider.h> 14 #include <linux/irqchip/irq-davinci-cp-intc.h> 16 #include <clocksource/timer-davinci.h> 55 MUX_CFG(DA830, NEMB_RAS, 0, 24, 0xf, 1, false) 63 MUX_CFG(DA830, EMB_A_4, 1, 24, 0xf, 1, false) 71 MUX_CFG(DA830, GPIO7_6, 1, 24, 0xf, 8, false) 79 MUX_CFG(DA830, EMB_A_12, 2, 24, 0xf, 1, false) 87 MUX_CFG(DA830, GPIO3_13, 2, 24, 0xf, 8, false) 94 MUX_CFG(DA830, EMB_D_24, 3, 24, 0xf, 1, false) [all …]
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/openbmc/linux/sound/soc/mediatek/mt8186/ |
H A D | mt8186-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 3 * mt8186-reg.h -- Mediatek 8186 audio driver reg definition 39 #define PDN_ADC_SFT 24 40 #define PDN_ADC_MASK_SFT BIT(24) 53 #define PDN_24M_SFT 9 54 #define PDN_24M_MASK_SFT BIT(9) 141 #define DL6_ON_SFT 9 142 #define DL6_ON_MASK_SFT BIT(9) 215 #define I2S3_UPDATE_WORD_SFT 24 216 #define I2S3_UPDATE_WORD_MASK_SFT GENMASK(28, 24) [all …]
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/openbmc/openbmc/meta-openembedded/meta-filesystems/recipes-filesystems/zfs/zfs/ |
H A D | aaf28a4630af60496c9d33db1d06a7d7d8983422.patch | 2 From: Sebastian Gottschall <s.gottschall@dd-wrt.com> 3 Date: Tue, 23 May 2023 13:50:24 +0600 8 …ild/tmp/work/imx8qm_var_som-yoe-linux/zfs/2.1.9-r0/build/../zfs-2.1.9/module/zfs/vdev_raidz_math_a… 11 …/build/tmp/work/imx8qm_var_som-yoe-linux/zfs/2.1.9-r0/build/../zfs-2.1.9/module/zfs/vdev_raidz_mat… 14 …aster/build/tmp/work/imx8qm_var_som-yoe-linux/zfs/2.1.9-r0/build/../zfs-2.1.9/module/zfs/vdev_raid… 17 …ild/tmp/work/imx8qm_var_som-yoe-linux/zfs/2.1.9-r0/build/../zfs-2.1.9/module/zfs/vdev_raidz_math_a… 20 …/build/tmp/work/imx8qm_var_som-yoe-linux/zfs/2.1.9-r0/build/../zfs-2.1.9/module/zfs/vdev_raidz_mat… 23 …aster/build/tmp/work/imx8qm_var_som-yoe-linux/zfs/2.1.9-r0/build/../zfs-2.1.9/module/zfs/vdev_raid… 26 …ild/tmp/work/imx8qm_var_som-yoe-linux/zfs/2.1.9-r0/build/../zfs-2.1.9/module/zfs/vdev_raidz_math_a… 29 …/build/tmp/work/imx8qm_var_som-yoe-linux/zfs/2.1.9-r0/build/../zfs-2.1.9/module/zfs/vdev_raidz_mat… [all …]
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/openbmc/linux/drivers/pinctrl/mediatek/ |
H A D | pinctrl-mt8365.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/pinctrl/mt65xx.h> 14 #include "pinctrl-mtk-common.h" 15 #include "pinctrl-mtk-mt8365.h" 37 MTK_PIN_DRV_GRP(9, 0x710, 8, 2), 48 MTK_PIN_DRV_GRP(20, 0x710, 24, 2), 49 MTK_PIN_DRV_GRP(21, 0x710, 24, 2), 52 MTK_PIN_DRV_GRP(24, 0x720, 0, 2), 77 MTK_PIN_DRV_GRP(49, 0x720, 24, 2), 78 MTK_PIN_DRV_GRP(50, 0x720, 24, 2), [all …]
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/openbmc/linux/include/linux/platform_data/ |
H A D | shmob_drm.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * shmob_drm.h -- SH Mobile DRM driver 22 SHMOB_DRM_IFACE_RGB8, /* 24bpp, 8:8:8 */ 23 SHMOB_DRM_IFACE_RGB9, /* 18bpp, 9:9 */ 24 SHMOB_DRM_IFACE_RGB12A, /* 24bpp, 12:12 */ 28 SHMOB_DRM_IFACE_RGB24, /* 24bpp */ 30 SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */ 34 SHMOB_DRM_IFACE_SYS9, /* 18bpp, 9:9 */ 35 SHMOB_DRM_IFACE_SYS12, /* 24bpp, 12:12 */ 40 SHMOB_DRM_IFACE_SYS24, /* 24bpp */
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/openbmc/u-boot/drivers/usb/host/ |
H A D | dwc2.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 73 #define DWC2_GOTGCTL_HNPREQ (1 << 9) 74 #define DWC2_GOTGCTL_HNPREQ_OFFSET 9 93 #define DWC2_GOTGINT_HSTNEGSUCSTSCHNG (1 << 9) 94 #define DWC2_GOTGINT_HSTNEGSUCSTSCHNG_OFFSET 9 132 #define DWC2_GUSBCFG_HNPCAP (1 << 9) 133 #define DWC2_GUSBCFG_HNPCAP_OFFSET 9 154 #define DWC2_GUSBCFG_INDICATOR_PASSTHROUGH (1 << 24) 155 #define DWC2_GUSBCFG_INDICATOR_PASSTHROUGH_OFFSET 24 188 #define DWC2_GLPMCTL_SEND_LPM (1 << 24) [all …]
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/openbmc/linux/drivers/clk/ti/ |
H A D | clk-44xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * Tero Kristo (t-kristo@ti.com) 15 #include <dt-bindings/clock/omap4.h> 54 { 24, TI_CLK_DIVIDER, omap4_aess_fclk_parents, &omap4_aess_fclk_data }, 59 "abe-clkctrl:0018:26", 73 { 24, TI_CLK_MUX, omap4_func_dmic_abe_gfclk_parents, NULL }, 79 "abe-clkctrl:0020:26", 86 { 24, TI_CLK_MUX, omap4_func_mcasp_abe_gfclk_parents, NULL }, 92 "abe-clkctrl:0028:26", 99 { 24, TI_CLK_MUX, omap4_func_mcbsp1_gfclk_parents, NULL }, [all …]
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