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/openbmc/linux/Documentation/networking/caif/
H A Dlinux_caif.rst1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| ST-Ericsson AB 2010
11 :License terms: GNU General Public License (GPL) version 2
17 CAIF is a MUX protocol used by ST-Ericsson cellular modems for
22 ST-Ericsson modems support a number of transports between modem
39 ! +------+ +------+
40 ! +------+! +------+!
42 +-------> !interf!+ ! API !+ <- CAIF Client APIs
43 ! +------+ +------!
45 ! +-----------+
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/openbmc/qemu/include/hw/arm/
H A Darmv7m.h7 * This code is licensed under the GPL version 2 or later.
20 #define TYPE_BITBAND "ARM-bitband-memory"
37 #define ARMV7M_NUM_BITBANDS 2
44 * + Property "cpu-type": CPU type to instantiate
45 * + Property "num-irq": number of external IRQ lines
46 * + Property "num-prio-bits": number of priority bits in the NVIC
48 * that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
49 * devices will be automatically layered on top of this view.)
51 * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object)
52 * + Property "init-nsvtor": non-secure VTOR reset value (forwarded to CPU object)
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/openbmc/linux/Documentation/block/
H A Dinline-encryption.rst1 .. SPDX-License-Identifier: GPL-2.0
19 keys directly in low-level I/O requests. However, most inline encryption
22 low-level I/O request then just contains a keyslot index and data unit number.
30 Inline encryption hardware is also very different from "self-encrypting drives",
31 such as those based on the TCG Opal or ATA Security standards. Self-encrypting
32 drives don't provide fine-grained control of encryption and provide no way to
34 provides fine-grained control of encryption, including the choice of key and
43 layered devices like device-mapper and loopback (i.e. we want to be able to use
50 - We need a way for upper layers (e.g. filesystems) to specify an encryption
56 - Different inline encryption hardware has different supported algorithms,
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H A Ddata-integrity.rst35 2. The Data Integrity Extensions
54 scatter-gather lists.
60 Also, the 16-bit CRC checksum mandated by both the SCSI and SATA specs
64 lighter-weight checksum to be used when interfacing with the operating
66 The IP checksum received from the OS is converted to the 16-bit CRC
102 concept of an end-to-end protection scheme is a layering violation.
118 16-bit value. The owner of this tag space is the owner of the block
134 -------
154 ----------------
166 Layered block devices will need to pick a profile that's appropriate
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/openbmc/linux/Documentation/scsi/
H A Dufs.rst1 .. SPDX-License-Identifier: GPL-2.0
11 2. UFS Architecture Overview
29 embedded and removable flash memory-based storage in mobile
32 on the MIPI M-PHY physical layer standard. UFS uses MIPI M-PHY as the
41 - Support for Gear1 is mandatory (rate A: 1248Mbps, rate B: 1457.6Mbps)
42 - Support for Gear2 is optional (rate A: 2496Mbps, rate B: 2915.2Mbps)
46 - Gear3 (rate A: 4992Mbps, rate B: 5830.4Mbps)
52 2. UFS Architecture Overview
55 UFS has a layered communication architecture which is based on SCSI
56 SAM-5 architectural model.
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/openbmc/linux/Documentation/userspace-api/media/cec/
H A Dcec-intro.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _cec-intro:
11 in supplements 1 (CEC) and 2 (HEAC or HDMI Ethernet and Audio Return
20 messages, especially those part of the HEAC protocol layered on top of
33 the `v4l-utils <https://git.linuxtv.org/v4l-utils.git/>`_ package. It
36 - cec-ctl: the Swiss army knife of CEC. Allows you to configure, transmit
39 - cec-compliance: does a CEC compliance test of a remote CEC device to
42 - cec-follower: emulates a CEC follower.
/openbmc/linux/net/core/
H A Ddev_addr_lists.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * net/core/dev_addr_lists.c - Functions for handling net device lists
24 struct rb_node **ins_point = &list->tree.rb_node, *parent = NULL; in __hw_addr_insert()
31 diff = memcmp(new->addr, ha->addr, addr_len); in __hw_addr_insert()
33 diff = memcmp(&new->type, &ha->type, sizeof(new->type)); in __hw_addr_insert()
37 ins_point = &parent->rb_left; in __hw_addr_insert()
39 ins_point = &parent->rb_right; in __hw_addr_insert()
41 return -EEXIST; in __hw_addr_insert()
44 rb_link_node_rcu(&new->node, parent, ins_point); in __hw_addr_insert()
45 rb_insert_color(&new->node, &list->tree); in __hw_addr_insert()
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/openbmc/linux/drivers/mtd/ubi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Enable UBI - Unsorted block images"
6 UBI is a software layer above MTD layer which admits use of LVM-like
10 (www.linux-mtd.infradead.org).
15 int "UBI wear-leveling threshold"
17 range 2 65536
26 other flashes which have eraseblock life-cycle 100000 or more.
28 life-cycle less than 10000, the threshold should be lessened (e.g.,
29 to 128 or 256, although it does not have to be power of 2).
44 as "1024 * (1 - MinNVB / MaxNVB)", which gives 20 for most NANDs
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/openbmc/docs/designs/
H A Dvpd-collection.md5 Created: 2019-06-11
10 Field Replaceable Units (FRUs) today - one example is the BMC FRU. On OpenPower
18 - Some of the VPD information such as FRU part number, serial number need to be
21 - Several use cases on the BMC require that the applications decide on a certain
26 - There are use cases for the BMC to send VPD data to the host
31 of certain parameters of the FRU (atypical - for FRUs that do not have an
39 Essentially, the IPZ VPD structure consists of key-value pairs called keywords.
52 - IPZ VPD has different records and keywords.
54 - IPZ VPD is required to implement and validate ECC as defined in the OpenPower
59 - The keyword format VPD is also something that consists of key-value pairs, but
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/openbmc/linux/Documentation/spi/
H A Dspi-lm70llp.rst2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
20 (layered under) the LM70 logical driver (a "SPI protocol driver").
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
39 D0 2 - -
40 D1 3 --> V+ 5
41 D2 4 --> V+ 5
42 D3 5 --> V+ 5
43 D4 6 --> V+ 5
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/openbmc/linux/include/linux/
H A Dblk-crypto-profile.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <linux/blk-crypto.h>
15 * struct blk_crypto_ll_ops - functions to control inline encryption hardware
17 * Low-level operations for controlling inline encryption hardware. This
19 * encryption. All functions may sleep, are serialized by profile->lock, and
20 * are never called while profile->dev (if set) is runtime-suspended.
29 * The keyslot is guaranteed to not be in-use by any I/O.
32 * device is a layered device, or if the device is real hardware that
35 * Must return 0 on success, or -errno on failure.
47 * The keyslot is guaranteed to not be in-use by any I/O.
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/openbmc/linux/arch/alpha/kernel/
H A Dsys_mikasa.c1 // SPDX-License-Identifier: GPL-2.0
48 mikasa_update_irq_hw(cached_irq_mask |= 1 << (d->irq - 16)); in mikasa_enable_irq()
54 mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (d->irq - 16))); in mikasa_disable_irq()
81 pld &= pld - 1; /* clear least bit set */ in mikasa_device_interrupt()
118 * 2 Interrupt Line C from slot 0
124 * 8 Interrupt Line A from slot 2
125 * 9 Interrupt Line B from slot 2
126 *10 Interrupt Line C from slot 2
127 *11 Interrupt Line D from slot 2
137 * 7 Intel PCI-EISA bridge chip
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H A Dsys_eb64p.c1 // SPDX-License-Identifier: GPL-2.0
37 static unsigned int cached_irq_mask = -1;
48 eb64p_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq)); in eb64p_enable_irq()
54 eb64p_update_irq_hw(d->irq, cached_irq_mask |= 1 << d->irq); in eb64p_disable_irq()
79 pld &= pld - 1; /* clear least bit set */ in eb64p_device_interrupt()
105 hwrpb->sys_variation |= 2L << 10; in eb64p_init_irq()
125 if (request_irq(16 + 5, no_action, 0, "isa-cascade", NULL)) in eb64p_init_irq()
126 pr_err("Failed to register isa-cascade interrupt\n"); in eb64p_init_irq()
138 * 2 Interrupt Line B from slot 0
149 * 2 Interrupt Line D from slot 1
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H A Dsys_alcor.c1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the ALCOR and XLT (XL-300/366/433).
48 alcor_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); in alcor_enable_irq()
54 alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); in alcor_disable_irq()
63 *(vuip)GRU_INT_CLEAR = 1 << (d->irq - 16); mb(); in alcor_mask_and_ack_irq()
99 pld &= pld - 1; /* clear least bit set */ in alcor_device_interrupt()
135 if (request_irq(16 + 31, no_action, 0, "isa-cascade", NULL)) in alcor_init_irq()
136 pr_err("Failed to register isa-cascade interrupt\n"); in alcor_init_irq()
145 * 0 Interrupt Line A from slot 2
146 * 1 Interrupt Line B from slot 2
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H A Dsys_noritake.c1 // SPDX-License-Identifier: GPL-2.0
53 noritake_update_irq_hw(d->irq, cached_irq_mask |= 1 << (d->irq - 16)); in noritake_enable_irq()
59 noritake_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << (d->irq - 16))); in noritake_disable_irq()
87 pld &= pld - 1; /* clear least bit set */ in noritake_device_interrupt()
101 irq = (vector - 0x800) >> 4; in noritake_srm_device_interrupt()
110 * So, here's this additional grotty hack... :-( in noritake_srm_device_interrupt()
145 * 0 All valid ints from summary regs 2 & 3
147 * 2 Interrupt Line A from slot 0
151 * 6 Interrupt Line A from slot 2
152 * 7 Interrupt Line B from slot 2
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H A Dsys_miata.c1 // SPDX-License-Identifier: GPL-2.0
39 irq = (vector - 0x800) >> 4; in miata_srm_device_interrupt()
47 * for reporting any interrupts (the PCI-ISA bridge, bit 7, isn't in miata_srm_device_interrupt()
49 * vectors 0x800-0x8f0). in miata_srm_device_interrupt()
53 * So, here's this grotty hack... :-( in miata_srm_device_interrupt()
83 if (request_irq(16 + 2, no_action, 0, "halt-switch", NULL)) in miata_init_irq()
84 pr_err("Failed to register halt-switch interrupt\n"); in miata_init_irq()
85 if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL)) in miata_init_irq()
86 pr_err("Failed to register timer-cascade interrupt\n"); in miata_init_irq()
97 * 2 Halt/Reset switch
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H A Dsys_sable.c1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
58 * 0-7 (char at 536)
59 * 8-15 (char at 53a)
60 * 16-23 (char at 53c)
65 *------------------------------------------
68 * 2 TULIP (builtin) 32
71 * 5 PCI slot 2 36
76 *10 EISA irq 3 -
77 *11 EISA irq 4 -
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-rbd14 The snapshot name can be "-" or omitted to map the image
15 read/write. A <dev-id> will be assigned for any registered block
16 device. If snapshot is used, it will be mapped read-only.
26 Usage: <dev-id> [force]
30 $ echo 2 > /sys/bus/rbd/remove
76 What: /sys/bus/rbd/devices/<dev-id>/size
77 What: /sys/bus/rbd/devices/<dev-id>/major
78 What: /sys/bus/rbd/devices/<dev-id>/client_id
79 What: /sys/bus/rbd/devices/<dev-id>/pool
80 What: /sys/bus/rbd/devices/<dev-id>/name
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dstarfive,jh7100-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd.
15 interesting 2-layered approach to pin muxing best illustrated by the diagram
21 LCD output -----------------| |
22 CMOS Camera interface ------| |--- PAD_GPIO[0]
23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1]
25 | |--- PAD_GPIO[63]
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/openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dclip_tbl.c3 * Copyright (C) 2003-2014 Chelsio Communications. All rights reserved.
23 unsigned int clipt_size_half = c->clipt_size / 2; in ipv4_clip_hash()
30 unsigned int clipt_size_half = d->clipt_size / 2; in ipv6_clip_hash()
31 u32 xor = key[0] ^ key[1] ^ key[2] ^ key[3]; in ipv6_clip_hash()
54 *(__be64 *)&c.ip_hi = *(__be64 *)(lip->s6_addr); in clip6_get_mbox()
55 *(__be64 *)&c.ip_lo = *(__be64 *)(lip->s6_addr + 8); in clip6_get_mbox()
56 return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, false); in clip6_get_mbox()
69 *(__be64 *)&c.ip_hi = *(__be64 *)(lip->s6_addr); in clip6_release_mbox()
70 *(__be64 *)&c.ip_lo = *(__be64 *)(lip->s6_addr + 8); in clip6_release_mbox()
71 return t4_wr_mbox_meat(adap, adap->mbox, &c, sizeof(c), &c, false); in clip6_release_mbox()
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/openbmc/linux/drivers/spi/
H A Dspi-lm70llp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for LM70EVAL-LLP board for the LM70 sensor
23 * The LM70 communicates with a host processor using a 3-wire variant of
26 * port to bitbang an SPI-parport bridge. Accordingly, this is an SPI
28 * driver", layered on top of this one and usable without the lm70llp.
33 * The schematic for this particular board (the LM70EVAL-LLP) is
37 * Also see Documentation/spi/spi-lm70llp.rst. The SPI<->parport code here is
38 * (heavily) based on spi-butterfly by David Brownell.
44 * ----------- --------- ------------
45 * D0 2 - -
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/openbmc/linux/Documentation/userspace-api/
H A Dseccomp_filter.rst25 to time-of-check-time-of-use (TOCTOU) attacks that are common in system
47 prctl(2) call as the strict seccomp. If the architecture has
65 call will return -1 and set errno to ``EINVAL``.
73 true, ``-EACCES`` will be returned. This requirement ensures that filter
77 Additionally, if ``prctl(2)`` is allowed by the attached filter,
78 additional filters may be layered on which will increase evaluation
82 The above call returns 0 on success and non-zero on error.
106 task without executing the system call. ``siginfo->si_call_addr``
108 ``siginfo->si_syscall`` and ``siginfo->si_arch`` will indicate which
111 instruction). The return value register will contain an arch-
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/openbmc/linux/block/
H A Dblk-crypto-profile.c1 // SPDX-License-Identifier: GPL-2.0
7 * DOC: blk-crypto profiles
9 * 'struct blk_crypto_profile' contains all generic inline encryption-related
17 * these keyslots in a device-independent way, using the driver-provided
22 * For more information, see Documentation/block/inline-encryption.rst.
25 #define pr_fmt(fmt) "blk-crypto: " fmt
27 #include <linux/blk-crypto-profile.h>
34 #include <linux/blk-integrity.h>
35 #include "blk-crypto-internal.h"
48 * Calling into the driver requires profile->lock held and the device in blk_crypto_hw_enter()
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/openbmc/openbmc-test-automation/lib/
H A Dgen_plug_in_utils.py4 This module provides functions which are useful to plug-in call point programs.
23 Return the plug-in package name (e.g. "OS_Console", "DB_Logging").
30 plug_in_package_name = os.path.basename(gp.pgm_dir_path[:-1])
41 …Return an OrderedDict which is sorted by key and which contains all of the plug-in environment var…
52 …- Set a default value for environment variable AUTOBOOT_OPENBMC_NICKNAME/AUTOIPL_FSP1_NICKNAME if …
54 - Register PASSWORD variables to prevent their values from being printed.
66 … non-string type in setting global variables (with the exception of os.environ values which must be
72 …general Return general plug-in parms (e.g. those beginning with "AUTOBOOT"…
74 …custom Return custom plug-in parms (i.e. those beginning with the upper c…
75 name of the plug-in package, for example "OBMC_SAMPLE_PARM1").
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/openbmc/linux/drivers/cxl/core/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/io-64-nonatomic-lo-hi.h>
7 #include <linux/pci-doe.h>
17 * Compute Express Link protocols are layered on top of PCIe. CXL core provides
36 struct cxl_port *port = ctx->port; in match_add_dports()
43 if (pdev->bus != ctx->bus) in match_add_dports()
47 if (type != ctx->type) in match_add_dports()
55 dev_dbg(&port->dev, "failed to find component registers\n"); in match_add_dports()
58 dport = devm_cxl_add_dport(port, &pdev->dev, port_num, map.resource); in match_add_dports()
60 ctx->error = PTR_ERR(dport); in match_add_dports()
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