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/openbmc/qemu/include/libdecnumber/
H A DdecDPD.h9 Software Foundation; either version 2, or (at your option) any later
29 02110-1301, USA. */
31 /* ------------------------------------------------------------------------ */
33 /* [Automatically generated -- do not edit. 2007.05.05] */
34 /* ------------------------------------------------------------------------ */
35 /* ------------------------------------------------------------------------ */
41 /* uint16_t BCD2DPD[2458]; -- BCD -> DPD (0x999 => 2457) */
42 /* uint16_t BIN2DPD[1000]; -- Bin -> DPD (999 => 2457) */
43 /* uint8_t BIN2CHAR[4001]; -- Bin -> CHAR (999 => '\3' '9' '9' '9') */
44 /* uint8_t BIN2BCD8[4000]; -- Bin -> bytes (999 => 9 9 9 3) */
[all …]
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dtie.h1 /* SPDX-License-Identifier: GPL-2.0+ */
8 * Copyright (C) 1999-2015 Cadence Design Systems Inc.
19 /* Save area for non-coprocessor optional and custom (TIE) state: */
24 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
37 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
38 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
41 * galign = group byte alignment (power of 2) (galign >= align)
42 * align = register byte alignment (power of 2)
45 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
47 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
62 * galign = group byte alignment (power of 2) (galign >= align)
63 * align = register byte alignment (power of 2)
66 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
68 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
63 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_TOTAL_SA_SIZE 48 /* with 16-byte align padding */
81 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
82 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
85 * galign = group byte alignment (power of 2) (galign >= align)
86 * align = register byte alignment (power of 2)
89 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
91 * regnum = reg index in regfile, or special/TIE-user reg number
[all …]
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 2 /* number of coprocessors */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 160 /* with 16-byte align padding */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
85 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
88 * galign = group byte alignment (power of 2) (galign >= align)
89 * align = register byte alignment (power of 2)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
35 #define XCHAL_CP_NUM 2 /* number of coprocessors */
66 /* Save area for non-coprocessor optional and custom (TIE) state: */
71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */
84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
85 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
88 * galign = group byte alignment (power of 2) (galign >= align)
89 * align = register byte alignment (power of 2)
92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 acodec_pins: acodec-pins {
36 /omit-if-no-ref/
37 audiopwm_lout: audiopwm-lout {
43 /omit-if-no-ref/
44 audiopwm_loutn: audiopwm-loutn {
50 /omit-if-no-ref/
[all …]
/openbmc/linux/tools/testing/selftests/kvm/aarch64/
H A Dget-reg-list.c1 // SPDX-License-Identifier: GPL-2.0
8 * kernel, we can't go older than v5.2, though, because that's the first
27 ARM64_SYS_REG(3, 0, 2, 0, 3), /* TCR2_EL1 */
28 ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
33 ARM64_SYS_REG(3, 0, 10, 2, 2), /* PIRE0_EL1 */
34 ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
39 ARM64_SYS_REG(3, 0, 10, 2, 3), /* PIR_EL1 */
40 ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
93 if (s->finalize) { in finalize_vcpu()
94 feature = s->feature; in finalize_vcpu()
[all …]
/openbmc/linux/arch/powerpc/lib/
H A Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
20 or 2,2,2 /* fixup will nop out this instruction */
21 or 3,3,3
27 or 2,2,2
28 or 3,3,3
33 or 3,3,3
37 or 2,2,2 /* fixup will replace this with ftr_fixup_test2_alt */
[all …]
/openbmc/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Author: Zheng Yang <zhengyang@rock-chips.com>
10 #include <linux/clk-provider.h>
16 #include <linux/nvmem-consumer.h>
28 #define RK3228_BYPASS_RXSENSE_EN BIT(2)
44 #define RK3228_RXSENSE_CLK_CH_ENABLE BIT(3)
45 #define RK3228_RXSENSE_DATA_CH2_ENABLE BIT(2)
50 #define RK3228_TMDS_DRIVER_ENABLE GENMASK(3, 0)
74 #define RK3228_PRE_PLL_TMDSCLK_DIV_A_MASK GENMASK(3, 2)
75 #define RK3228_PRE_PLL_TMDSCLK_DIV_A(x) UPDATE(x, 3, 2)
[all …]
/openbmc/linux/Documentation/hwmon/
H A Dir35221.rst9 Addresses scanned: -
13 Author: Samuel Mendoza-Jonas <sam@mendozajonas.com>
17 -----------
19 IR35221 is a Digital DC-DC Multiphase Converter
23 -----------
32 # echo ir35221 0x70 > /sys/bus/i2c/devices/i2c-4/new_device
36 ----------------
44 curr[2-3]_label "iout[1-2]"
45 curr[2-3]_input Measured output current
46 curr[2-3]_crit Critical maximum current
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
21 * C5.2, version:ARM DDI 0487A.f)
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
[all …]
/openbmc/linux/drivers/clk/xilinx/
H A Dxlnx_vcu.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016 - 2017 Xilinx, Inc.
11 #include <linux/clk-provider.h>
16 #include <linux/mfd/syscon/xlnx-vcu.h>
22 #include <dt-bindings/clock/xlnx-vcu.h>
27 #define VCU_PLL_CTRL_PWR_POR BIT(2)
28 #define VCU_PLL_CTRL_BYPASS BIT(3)
33 #define VCU_PLL_CFG_RES GENMASK(3, 0)
50 * struct xvcu_device - Xilinx VCU init device structure
81 * struct xvcu_pll_cfg - Helper data
[all …]
/openbmc/linux/arch/arm64/crypto/
H A Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
8 * it under the terms of the GNU General Public License version 2 as
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
17 .set .Lv\b\().2d, \b
37 * The SHA-512 round constants
85 ld1 {v\rc1\().2d}, [x4], #16
87 add v5.2d, v\rc0\().2d, v\in0\().2d
91 add v\i3\().2d, v\i3\().2d, v5.2d
94 sha512su0 v\in0\().2d, v\in1\().2d
[all …]
/openbmc/u-boot/lib/libavb/
H A Davb_sha256.c1 // SPDX-License-Identifier: BSD-3-Clause
6 * FIPS 180-2 SHA-224/256/384/512 implementation
14 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
15 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
19 #define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
21 #define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
26 *((str) + 3) = (uint8_t)((x)); \
27 *((str) + 2) = (uint8_t)((x) >> 8); \
34 *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
42 { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
[all …]
/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/spectrum/
H A Dvxlan_flooding_ipv6.sh2 # SPDX-License-Identifier: GPL-2.0
9 # +-----------------------+
13 # +----|------------------+
15 # +----|----------------------------------------------------------------------+
17 # | +--|--------------------------------------------------------------------+ |
21 # | | local 2001:db8:2::1 | |
22 # | | remote 2001:db8:2::{2..21} | |
24 # | +-----------------------------------------------------------------------+ |
26 # | 2001:db8:2::0/64 via 2001:db8:3::2 |
29 # | | 2001:db8:3::1/64 |
[all …]
/openbmc/linux/fs/exfat/
H A Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-rgb.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
57 for each component. For instance, the RGB565 format stores a pixel in a 16-bit
[all …]
/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dfib_offload.sh2 # SPDX-License-Identifier: GPL-2.0
20 simple_if_init $tor1_p1 2001:db8:1::2/128 2001:db8:1::3/128
25 simple_if_fini $tor1_p1 2001:db8:1::2/128 2001:db8:1::3/128
30 simple_if_init $tor2_p1 2001:db8:2::2/128 2001:db8:2::3/128
35 simple_if_fini $tor2_p1 2001:db8:2::2/128 2001:db8:2::3/128
44 __addr_add_del $spine_p2 add 2001:db8:2::1/64
49 __addr_add_del $spine_p2 del 2001:db8:2::1/64
65 num=$(ip -6 route show match ${pfx} | grep "offload" | wc -l)
67 if [ $num -eq $expected_num ]; then
79 ip -6 route add 2001:db8:3::/64 dev $spine_p1 metric 100
[all …]
/openbmc/linux/Documentation/input/devices/
H A Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
9 Version 2 (EeePC) hardware support based on patches
16 2. Extra knobs
17 3. Differentiating hardware versions
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
26 5.2.2 One/Three finger touch
27 5.2.3 Two finger touch
28 6. Hardware version 3
32 6.2.2 Two finger touch
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/openbmc/phosphor-webui/app/assets/images/
H A DDMTF_Redfish_logo_2017.svg1-color="#20ac4b"/><stop offset=".9831" stop-color="#19361a"/></linearGradient><linearGradient id="…
/openbmc/openbmc/meta-raspberrypi/recipes-core/psplash/files/
H A Dpsplash-raspberrypi-img.h1 /* GdkPixbuf RGBA C-Source image dump 1-byte-run-length-encoded */
6 #define POKY_IMG_BYTES_PER_PIXEL (4) /* 3:RGB, 4:RGBA */
10 "\372\0\0\0\0\3\0\0\0\4\0\0\0)\0\0\0F\202\0\0\0U\2\0\0\0G\0\0\0\37\377" \
12 "\206\0\0\0\377\4\0\0\0\356\0\0\0\271\0\0\0t\0\0\0-\377\0\0\0\0\363\0" \
13 "\0\0\0\4\0\0\0-\0\0\0|\0\0\0\311\0\0\0\371\206\0\0\0\377\4\0\0\0\356" \
16 "\0\0\231\0\0\0\214\0\0\0c\0\0\0""7\0\0\0\15\214\0\0\0\0\3\0\0\0\30\0" \
17 "\0\0\220\0\0\0\366\215\0\0\0\377\3\0\0\0\320\0\0\0l\0\0\0\17\377\0\0" \
18 "\0\0\355\0\0\0\0\3\0\0\0\35\0\0\0\202\0\0\0\335\215\0\0\0\377\3\0\0\0" \
21 "1\0\0\0\2\377\0\0\0\0\364\0\0\0\0\4\0\0\0\12\0\0\0]\0\0\0\267\0\0\0\367" \
22 "\214\0\0\0\377\4\0\0\0\333\0\0\0\232\0\0\0V\0\0\0\24\206\0\0\0\0\3\0" \
[all …]
/openbmc/linux/arch/arm/mach-omap1/
H A Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
25 pwms = <&pwm 2 2000000 0>;
26 pwm-names = "pwm2";
[all …]
/openbmc/linux/arch/csky/include/asm/
H A Duaccess.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 "1: stb %1, (%2,0) \n" \
16 " br 3f \n" \
17 "2: mov %0, %3 \n" \
18 " br 3f \n" \
20 ".align 2 \n" \
21 ".long 1b,2b \n" \
23 "3: \n" \
25 : "0"(err), "1"(x), "2"(ptr), "3"(-EFAULT) \
33 "1: sth %1, (%2,0) \n" \
[all …]

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