19da8320bSMax Filippov /* 29da8320bSMax Filippov * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration 39da8320bSMax Filippov * 49da8320bSMax Filippov * NOTE: This header file is not meant to be included directly. 59da8320bSMax Filippov */ 69da8320bSMax Filippov 79da8320bSMax Filippov /* This header file describes this specific Xtensa processor's TIE extensions 89da8320bSMax Filippov that extend basic Xtensa core functionality. It is customized to this 99da8320bSMax Filippov Xtensa processor configuration. 109da8320bSMax Filippov 119da8320bSMax Filippov Copyright (c) 1999-2014 Tensilica Inc. 129da8320bSMax Filippov 139da8320bSMax Filippov Permission is hereby granted, free of charge, to any person obtaining 149da8320bSMax Filippov a copy of this software and associated documentation files (the 159da8320bSMax Filippov "Software"), to deal in the Software without restriction, including 169da8320bSMax Filippov without limitation the rights to use, copy, modify, merge, publish, 179da8320bSMax Filippov distribute, sublicense, and/or sell copies of the Software, and to 189da8320bSMax Filippov permit persons to whom the Software is furnished to do so, subject to 199da8320bSMax Filippov the following conditions: 209da8320bSMax Filippov 219da8320bSMax Filippov The above copyright notice and this permission notice shall be included 229da8320bSMax Filippov in all copies or substantial portions of the Software. 239da8320bSMax Filippov 249da8320bSMax Filippov THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 259da8320bSMax Filippov EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 269da8320bSMax Filippov MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 279da8320bSMax Filippov IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 289da8320bSMax Filippov CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 299da8320bSMax Filippov TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 309da8320bSMax Filippov SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ 319da8320bSMax Filippov 329da8320bSMax Filippov #ifndef _XTENSA_CORE_TIE_H 339da8320bSMax Filippov #define _XTENSA_CORE_TIE_H 349da8320bSMax Filippov 359da8320bSMax Filippov #define XCHAL_CP_NUM 2 /* number of coprocessors */ 369da8320bSMax Filippov #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */ 379da8320bSMax Filippov #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */ 389da8320bSMax Filippov #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */ 399da8320bSMax Filippov 409da8320bSMax Filippov /* Basic parameters of each coprocessor: */ 419da8320bSMax Filippov #define XCHAL_CP1_NAME "AudioEngineLX" 429da8320bSMax Filippov #define XCHAL_CP1_IDENT AudioEngineLX 439da8320bSMax Filippov #define XCHAL_CP1_SA_SIZE 184 /* size of state save area */ 449da8320bSMax Filippov #define XCHAL_CP1_SA_ALIGN 8 /* min alignment of save area */ 459da8320bSMax Filippov #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */ 469da8320bSMax Filippov #define XCHAL_CP7_NAME "XTIOP" 479da8320bSMax Filippov #define XCHAL_CP7_IDENT XTIOP 489da8320bSMax Filippov #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */ 499da8320bSMax Filippov #define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */ 509da8320bSMax Filippov #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */ 519da8320bSMax Filippov 529da8320bSMax Filippov /* Filler info for unassigned coprocessors, to simplify arrays etc: */ 539da8320bSMax Filippov #define XCHAL_CP0_SA_SIZE 0 549da8320bSMax Filippov #define XCHAL_CP0_SA_ALIGN 1 559da8320bSMax Filippov #define XCHAL_CP2_SA_SIZE 0 569da8320bSMax Filippov #define XCHAL_CP2_SA_ALIGN 1 579da8320bSMax Filippov #define XCHAL_CP3_SA_SIZE 0 589da8320bSMax Filippov #define XCHAL_CP3_SA_ALIGN 1 599da8320bSMax Filippov #define XCHAL_CP4_SA_SIZE 0 609da8320bSMax Filippov #define XCHAL_CP4_SA_ALIGN 1 619da8320bSMax Filippov #define XCHAL_CP5_SA_SIZE 0 629da8320bSMax Filippov #define XCHAL_CP5_SA_ALIGN 1 639da8320bSMax Filippov #define XCHAL_CP6_SA_SIZE 0 649da8320bSMax Filippov #define XCHAL_CP6_SA_ALIGN 1 659da8320bSMax Filippov 669da8320bSMax Filippov /* Save area for non-coprocessor optional and custom (TIE) state: */ 679da8320bSMax Filippov #define XCHAL_NCP_SA_SIZE 36 689da8320bSMax Filippov #define XCHAL_NCP_SA_ALIGN 4 699da8320bSMax Filippov 709da8320bSMax Filippov /* Total save area for optional and custom state (NCP + CPn): */ 719da8320bSMax Filippov #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */ 729da8320bSMax Filippov #define XCHAL_TOTAL_SA_ALIGN 8 /* actual minimum alignment */ 739da8320bSMax Filippov 749da8320bSMax Filippov /* 759da8320bSMax Filippov * Detailed contents of save areas. 769da8320bSMax Filippov * NOTE: caller must define the XCHAL_SA_REG macro (not defined here) 779da8320bSMax Filippov * before expanding the XCHAL_xxx_SA_LIST() macros. 789da8320bSMax Filippov * 799da8320bSMax Filippov * XCHAL_SA_REG(s,ccused,abikind,kind,opt,name,galign,align,asize, 809da8320bSMax Filippov * dbnum,base,regnum,bitsz,gapsz,reset,x...) 819da8320bSMax Filippov * 829da8320bSMax Filippov * s = passed from XCHAL_*_LIST(s), eg. to select how to expand 839da8320bSMax Filippov * ccused = set if used by compiler without special options or code 849da8320bSMax Filippov * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global) 859da8320bSMax Filippov * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg) 869da8320bSMax Filippov * opt = 0 (custom TIE extension or coprocessor), or 1 (optional reg) 879da8320bSMax Filippov * name = lowercase reg name (no quotes) 889da8320bSMax Filippov * galign = group byte alignment (power of 2) (galign >= align) 899da8320bSMax Filippov * align = register byte alignment (power of 2) 909da8320bSMax Filippov * asize = allocated size in bytes (asize*8 == bitsz + gapsz + padsz) 919da8320bSMax Filippov * (not including any pad bytes required to galign this or next reg) 929da8320bSMax Filippov * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>) 939da8320bSMax Filippov * base = reg shortname w/o index (or sr=special, ur=TIE user reg) 949da8320bSMax Filippov * regnum = reg index in regfile, or special/TIE-user reg number 959da8320bSMax Filippov * bitsz = number of significant bits (regfile width, or ur/sr mask bits) 969da8320bSMax Filippov * gapsz = intervening bits, if bitsz bits not stored contiguously 979da8320bSMax Filippov * (padsz = pad bits at end [TIE regfile] or at msbits [ur,sr] of asize) 989da8320bSMax Filippov * reset = register reset value (or 0 if undefined at reset) 999da8320bSMax Filippov * x = reserved for future use (0 until then) 1009da8320bSMax Filippov * 1019da8320bSMax Filippov * To filter out certain registers, e.g. to expand only the non-global 1029da8320bSMax Filippov * registers used by the compiler, you can do something like this: 1039da8320bSMax Filippov * 1049da8320bSMax Filippov * #define XCHAL_SA_REG(s,ccused,p...) SELCC##ccused(p) 1059da8320bSMax Filippov * #define SELCC0(p...) 1069da8320bSMax Filippov * #define SELCC1(abikind,p...) SELAK##abikind(p) 1079da8320bSMax Filippov * #define SELAK0(p...) REG(p) 1089da8320bSMax Filippov * #define SELAK1(p...) REG(p) 1099da8320bSMax Filippov * #define SELAK2(p...) 1109da8320bSMax Filippov * #define REG(kind,tie,name,galn,aln,asz,csz,dbnum,base,rnum,bsz,rst,x...) \ 1119da8320bSMax Filippov * ...what you want to expand... 1129da8320bSMax Filippov */ 1139da8320bSMax Filippov 1149da8320bSMax Filippov #define XCHAL_NCP_SA_NUM 9 1159da8320bSMax Filippov #define XCHAL_NCP_SA_LIST(s) \ 1169da8320bSMax Filippov XCHAL_SA_REG(s,1,2,1,1, threadptr, 4, 4, 4,0x03E7, ur,231, 32,0,0,0) \ 1179da8320bSMax Filippov XCHAL_SA_REG(s,1,0,0,1, acclo, 4, 4, 4,0x0210, sr,16 , 32,0,0,0) \ 1189da8320bSMax Filippov XCHAL_SA_REG(s,1,0,0,1, acchi, 4, 4, 4,0x0211, sr,17 , 8,0,0,0) \ 1199da8320bSMax Filippov XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \ 1209da8320bSMax Filippov XCHAL_SA_REG(s,0,0,0,1, m1, 4, 4, 4,0x0221, sr,33 , 32,0,0,0) \ 1219da8320bSMax Filippov XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \ 1229da8320bSMax Filippov XCHAL_SA_REG(s,0,0,0,1, m3, 4, 4, 4,0x0223, sr,35 , 32,0,0,0) \ 1239da8320bSMax Filippov XCHAL_SA_REG(s,0,0,0,1, br, 4, 4, 4,0x0204, sr,4 , 16,0,0,0) \ 1249da8320bSMax Filippov XCHAL_SA_REG(s,0,0,0,1, scompare1, 4, 4, 4,0x020C, sr,12 , 32,0,0,0) 1259da8320bSMax Filippov 1269da8320bSMax Filippov #define XCHAL_CP0_SA_NUM 0 1279da8320bSMax Filippov #define XCHAL_CP0_SA_LIST(s) /* empty */ 1289da8320bSMax Filippov 1299da8320bSMax Filippov #define XCHAL_CP1_SA_NUM 26 1309da8320bSMax Filippov #define XCHAL_CP1_SA_LIST(s) \ 1319da8320bSMax Filippov XCHAL_SA_REG(s,0,0,1,0, ae_ovf_sar, 8, 4, 4,0x03F0, ur,240, 8,0,0,0) \ 1329da8320bSMax Filippov XCHAL_SA_REG(s,0,0,1,0, ae_bithead, 4, 4, 4,0x03F1, ur,241, 32,0,0,0) \ 1339da8320bSMax Filippov XCHAL_SA_REG(s,0,0,1,0,ae_ts_fts_bu_bp, 4, 4, 4,0x03F2, ur,242, 16,0,0,0) \ 1349da8320bSMax Filippov XCHAL_SA_REG(s,0,0,1,0, ae_cw_sd_no, 4, 4, 4,0x03F3, ur,243, 29,0,0,0) \ 1359da8320bSMax Filippov XCHAL_SA_REG(s,0,0,1,0, ae_cbegin0, 4, 4, 4,0x03F6, ur,246, 32,0,0,0) \ 1369da8320bSMax Filippov XCHAL_SA_REG(s,0,0,1,0, ae_cend0, 4, 4, 4,0x03F7, ur,247, 32,0,0,0) \ 1379da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed0, 8, 8, 8,0x1010, aed,0 , 64,0,0,0) \ 1389da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed1, 8, 8, 8,0x1011, aed,1 , 64,0,0,0) \ 1399da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed2, 8, 8, 8,0x1012, aed,2 , 64,0,0,0) \ 1409da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed3, 8, 8, 8,0x1013, aed,3 , 64,0,0,0) \ 1419da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed4, 8, 8, 8,0x1014, aed,4 , 64,0,0,0) \ 1429da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed5, 8, 8, 8,0x1015, aed,5 , 64,0,0,0) \ 1439da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed6, 8, 8, 8,0x1016, aed,6 , 64,0,0,0) \ 1449da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed7, 8, 8, 8,0x1017, aed,7 , 64,0,0,0) \ 1459da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed8, 8, 8, 8,0x1018, aed,8 , 64,0,0,0) \ 1469da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed9, 8, 8, 8,0x1019, aed,9 , 64,0,0,0) \ 1479da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed10, 8, 8, 8,0x101A, aed,10 , 64,0,0,0) \ 1489da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed11, 8, 8, 8,0x101B, aed,11 , 64,0,0,0) \ 1499da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed12, 8, 8, 8,0x101C, aed,12 , 64,0,0,0) \ 1509da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed13, 8, 8, 8,0x101D, aed,13 , 64,0,0,0) \ 1519da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed14, 8, 8, 8,0x101E, aed,14 , 64,0,0,0) \ 1529da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, aed15, 8, 8, 8,0x101F, aed,15 , 64,0,0,0) \ 1539da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, u0, 8, 8, 8,0x1020, u,0 , 64,0,0,0) \ 1549da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, u1, 8, 8, 8,0x1021, u,1 , 64,0,0,0) \ 1559da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, u2, 8, 8, 8,0x1022, u,2 , 64,0,0,0) \ 1569da8320bSMax Filippov XCHAL_SA_REG(s,0,0,2,0, u3, 8, 8, 8,0x1023, u,3 , 64,0,0,0) 1579da8320bSMax Filippov 1589da8320bSMax Filippov #define XCHAL_CP2_SA_NUM 0 1599da8320bSMax Filippov #define XCHAL_CP2_SA_LIST(s) /* empty */ 1609da8320bSMax Filippov 1619da8320bSMax Filippov #define XCHAL_CP3_SA_NUM 0 1629da8320bSMax Filippov #define XCHAL_CP3_SA_LIST(s) /* empty */ 1639da8320bSMax Filippov 1649da8320bSMax Filippov #define XCHAL_CP4_SA_NUM 0 1659da8320bSMax Filippov #define XCHAL_CP4_SA_LIST(s) /* empty */ 1669da8320bSMax Filippov 1679da8320bSMax Filippov #define XCHAL_CP5_SA_NUM 0 1689da8320bSMax Filippov #define XCHAL_CP5_SA_LIST(s) /* empty */ 1699da8320bSMax Filippov 1709da8320bSMax Filippov #define XCHAL_CP6_SA_NUM 0 1719da8320bSMax Filippov #define XCHAL_CP6_SA_LIST(s) /* empty */ 1729da8320bSMax Filippov 1739da8320bSMax Filippov #define XCHAL_CP7_SA_NUM 0 1749da8320bSMax Filippov #define XCHAL_CP7_SA_LIST(s) /* empty */ 1759da8320bSMax Filippov 1769da8320bSMax Filippov /* Byte length of instruction from its first nibble (op0 field), per FLIX. */ 1779da8320bSMax Filippov #define XCHAL_OP0_FORMAT_LENGTHS 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8 1789da8320bSMax Filippov /* Byte length of instruction from its first byte, per FLIX. */ 1799da8320bSMax Filippov #define XCHAL_BYTE0_FORMAT_LENGTHS \ 1809da8320bSMax Filippov 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8,\ 1819da8320bSMax Filippov 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8,\ 1829da8320bSMax Filippov 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8,\ 1839da8320bSMax Filippov 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8,\ 1849da8320bSMax Filippov 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8,\ 1859da8320bSMax Filippov 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8,\ 1869da8320bSMax Filippov 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8,\ 1879da8320bSMax Filippov 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,8,8 1889da8320bSMax Filippov 1899da8320bSMax Filippov #endif /*_XTENSA_CORE_TIE_H*/ 190