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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c676 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
678 // max = such that compression is 1:1 in dscceComputeDelay()
680 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
692 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
694 pixelsPerClock = 1; in dscceComputeDelay()
698 pixelsPerClock = 1; in dscceComputeDelay()
718 s = 1; in dscceComputeDelay()
726 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
727 L = (ax + wx - 1) / wx; in dscceComputeDelay()
729 lstall = 1; in dscceComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c503 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
505 // max = such that compression is 1:1 in dscceComputeDelay()
507 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
519 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
521 pixelsPerClock = 1; in dscceComputeDelay()
539 S = 1; in dscceComputeDelay()
549 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
550 l = (ax + wx - 1) / wx; in dscceComputeDelay()
552 lstall = 1; in dscceComputeDelay()
555 Delay = l * wx * (numSlices - 1) + ax + S + lstall + 22; in dscceComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.c41 // valid bpp = increments of 1/16 of a bit in dml32_dscceComputeDelay()
43 // max = such that compression is 1:1 in dml32_dscceComputeDelay()
46 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dml32_dscceComputeDelay()
60 // #all other modes operate at 1 pixel per clock in dml32_dscceComputeDelay()
62 pixelsPerClock = 1; in dml32_dscceComputeDelay()
82 s = 1; in dml32_dscceComputeDelay()
90 ax = (a + 2) / 3 + D + 6 + 1; in dml32_dscceComputeDelay()
91 L = (ax + wx - 1) / wx; in dml32_dscceComputeDelay()
93 lstall = 1; in dml32_dscceComputeDelay()
96 Delay = L * wx * (numSlices - 1) + ax + s + lstall + 22; in dml32_dscceComputeDelay()
[all …]
H A Ddisplay_mode_vba_32.c62 unsigned int j, k; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
85 for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
86 if (mode_lib->vba.WritebackEnable[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
89 mode_lib->vba.WritebackPixelFormat[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
90 mode_lib->vba.PixelClock[k], mode_lib->vba.WritebackHRatio[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
91 mode_lib->vba.WritebackVRatio[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
92 mode_lib->vba.WritebackHTaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
93 mode_lib->vba.WritebackVTaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
94 mode_lib->vba.WritebackSourceWidth[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
95 mode_lib->vba.WritebackDestinationWidth[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D15428 status=1 # failure is the default!
34 trap "_cleanup; exit \$status" 0 1 2 3 15
44 CLUSTER_SIZE=4k
63 # 1. Tail unaligned: 00 00 -- --
68 $QEMU_IO -c "write -z 0 2k" "$TEST_IMG" | _filter_qemu_io
69 $QEMU_IO -c "write -z 10k 2k" "$TEST_IMG" | _filter_qemu_io
70 $QEMU_IO -c "write -z 17k 2k" "$TEST_IMG" | _filter_qemu_io
71 $QEMU_IO -c "write -z 27k 2k" "$TEST_IMG" | _filter_qemu_io
82 $QEMU_IO -c "write -P 0x11 32k 1k" "$TEST_IMG.base" | _filter_qemu_io
83 $QEMU_IO -c "write -z 34k 1k" "$TEST_IMG" | _filter_qemu_io
[all …]
H A D27130 status=1 # failure is the default!
37 trap "_cleanup; exit \$status" 0 1 2 3 15
46 _unsupported_imgopts extended_l2 compat=0.10 cluster_size data_file refcount_bits=1[^0-9]
60 entry_no="$1" # L2 entry number, starting from 0
71 expected_bitmap=$(($expected_bitmap | (1 << $bit)))
74 expected_bitmap=$(($expected_bitmap | (1 << (32 + $bit))))
88 # len: request length, passed directly to qemu-io (e.g: 256, 4k, 1M, ...)
105 pat=$((${pat:-0} + 1))
108 pat=$((${pat:-0} + 1))
114 exit 1;;
[all …]
H A D271.out8 write -q -P PATTERN 0 1k
10 write -q -P PATTERN 3k 512
12 write -q -P PATTERN 5k 1k
14 write -q -P PATTERN 6k 2k
16 write -q -P PATTERN 8k 6k
18 write -q -P PATTERN 15k 4k
20 write -q -P PATTERN 32k 1k
22 write -q -P PATTERN 63k 4k
24 L2 entry #1: 0x8000000000060000 0000000000000003
25 write -q -z 2k 2k
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c332 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
334 // max = such that compression is 1:1 in dscceComputeDelay()
336 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
348 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
350 pixelsPerClock = 1; in dscceComputeDelay()
368 s = 1; in dscceComputeDelay()
378 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
379 l = (ax + wx - 1) / wx; in dscceComputeDelay()
381 lstall = 1; in dscceComputeDelay()
384 Delay = l * wx * (numSlices - 1) + ax + s + lstall + 22; in dscceComputeDelay()
[all …]
H A Ddisplay_mode_vba_20.c308 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
310 // max = such that compression is 1:1 in dscceComputeDelay()
312 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
324 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
326 pixelsPerClock = 1; in dscceComputeDelay()
344 s = 1; in dscceComputeDelay()
354 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
355 l = (ax + wx - 1) / wx; in dscceComputeDelay()
357 lstall = 1; in dscceComputeDelay()
360 Delay = l * wx * (numSlices - 1) + ax + s + lstall + 22; in dscceComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c57 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
267 unsigned int k,
700 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
702 // max = such that compression is 1:1 in dscceComputeDelay()
704 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
716 pixelsPerClock = 1; in dscceComputeDelay()
719 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
721 pixelsPerClock = 1; in dscceComputeDelay()
741 s = 1; in dscceComputeDelay()
749 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c56 // Delay in DCFCLK from ARB to DET (1st num is ARB to SDPIF, 2nd number is SDPIF to DET)
255 unsigned int k,
679 // valid bpp = increments of 1/16 of a bit in dscceComputeDelay()
681 // max = such that compression is 1:1 in dscceComputeDelay()
683 …mSlices = number of slices in the horiziontal direction per DSC engine in the set of {1, 2, 3, 4} in dscceComputeDelay()
695 pixelsPerClock = 1; in dscceComputeDelay()
698 // #all other modes operate at 1 pixel per clock in dscceComputeDelay()
700 pixelsPerClock = 1; in dscceComputeDelay()
720 s = 1; in dscceComputeDelay()
728 ax = (a + 2) / 3 + D + 6 + 1; in dscceComputeDelay()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calc_auto.c42 int k; in scaler_settings_calculation() local
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
59 …v->h_ratio[k] =dcn_bw_max2(v->viewport_height[k] / v->scaler_rec_out_width[k], v->viewport_width[k… in scaler_settings_calculation()
[all …]
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-t/
H A Dit-All25 TRANSMISSION_MODE = 8K
26 GUARD_INTERVAL = 1/32
38 TRANSMISSION_MODE = 8K
39 GUARD_INTERVAL = 1/32
51 TRANSMISSION_MODE = 8K
52 GUARD_INTERVAL = 1/32
64 TRANSMISSION_MODE = 8K
65 GUARD_INTERVAL = 1/32
77 TRANSMISSION_MODE = 8K
78 GUARD_INTERVAL = 1/32
[all …]
H A Dat-All11 TRANSMISSION_MODE = 8K
12 GUARD_INTERVAL = 1/4
23 TRANSMISSION_MODE = 8K
24 GUARD_INTERVAL = 1/4
35 TRANSMISSION_MODE = 8K
36 GUARD_INTERVAL = 1/4
47 TRANSMISSION_MODE = 8K
48 GUARD_INTERVAL = 1/4
59 TRANSMISSION_MODE = 8K
60 GUARD_INTERVAL = 1/4
[all …]
H A Dnl-All8 CODE_RATE_HP = 1/2
11 TRANSMISSION_MODE = 8K
12 GUARD_INTERVAL = 1/4
23 TRANSMISSION_MODE = 8K
24 GUARD_INTERVAL = 1/4
32 CODE_RATE_HP = 1/2
35 TRANSMISSION_MODE = 8K
36 GUARD_INTERVAL = 1/4
47 TRANSMISSION_MODE = 8K
48 GUARD_INTERVAL = 1/4
[all …]
H A Dfr-All9 TRANSMISSION_MODE = 8K
10 GUARD_INTERVAL = 1/32
21 TRANSMISSION_MODE = 8K
22 GUARD_INTERVAL = 1/32
33 TRANSMISSION_MODE = 8K
34 GUARD_INTERVAL = 1/32
45 TRANSMISSION_MODE = 8K
46 GUARD_INTERVAL = 1/32
57 TRANSMISSION_MODE = 8K
58 GUARD_INTERVAL = 1/32
[all …]
H A Dcz-All11 TRANSMISSION_MODE = 8K
12 GUARD_INTERVAL = 1/8
23 TRANSMISSION_MODE = 8K
24 GUARD_INTERVAL = 1/8
35 TRANSMISSION_MODE = 8K
36 GUARD_INTERVAL = 1/8
47 TRANSMISSION_MODE = 8K
48 GUARD_INTERVAL = 1/8
59 TRANSMISSION_MODE = 8K
60 GUARD_INTERVAL = 1/8
[all …]
H A Dee-All12 TRANSMISSION_MODE = 8K
13 GUARD_INTERVAL = 1/8
24 TRANSMISSION_MODE = 8K
25 GUARD_INTERVAL = 1/8
36 TRANSMISSION_MODE = 8K
37 GUARD_INTERVAL = 1/8
48 TRANSMISSION_MODE = 8K
49 GUARD_INTERVAL = 1/8
60 TRANSMISSION_MODE = 8K
61 GUARD_INTERVAL = 1/8
[all …]
H A Dch-All11 TRANSMISSION_MODE = 8K
12 GUARD_INTERVAL = 1/4
23 TRANSMISSION_MODE = 8K
24 GUARD_INTERVAL = 1/4
35 TRANSMISSION_MODE = 8K
36 GUARD_INTERVAL = 1/4
47 TRANSMISSION_MODE = 8K
48 GUARD_INTERVAL = 1/4
59 TRANSMISSION_MODE = 8K
60 GUARD_INTERVAL = 1/4
[all …]
H A Dch-Citycable9 TRANSMISSION_MODE = 8K
10 GUARD_INTERVAL = 1/32
21 TRANSMISSION_MODE = 8K
22 GUARD_INTERVAL = 1/32
33 TRANSMISSION_MODE = 8K
34 GUARD_INTERVAL = 1/32
45 TRANSMISSION_MODE = 8K
46 GUARD_INTERVAL = 1/32
57 TRANSMISSION_MODE = 8K
58 GUARD_INTERVAL = 1/32
[all …]
H A Des-Cadiz11 TRANSMISSION_MODE = 8K
12 GUARD_INTERVAL = 1/4
23 TRANSMISSION_MODE = 8K
24 GUARD_INTERVAL = 1/4
35 TRANSMISSION_MODE = 8K
36 GUARD_INTERVAL = 1/4
40 # 498000000 8MHz 2/3 NONE QAM64 8k 1/4 NONE # C24 # TL02CA Arcos
48 TRANSMISSION_MODE = 8K
49 GUARD_INTERVAL = 1/4
53 # 522000000 8MHz 2/3 NONE QAM64 8k 1/4 NONE # C27 # TL06CA Olvera
[all …]
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dimage-fleecing.out23 read -P0x5d 0 64k
24 read -P0xd5 1M 64k
25 read -P0xdc 32M 64k
26 read -P0xcd 0x3ff0000 64k
27 read -P0 0x00f8000 32k
28 read -P0 0x2010000 32k
29 read -P0 0x3fe0000 64k
33 write -P0xab 0 64k
35 write -P0xad 0x00f8000 64k
37 write -P0x1d 0x2008000 64k
[all …]
/openbmc/linux/drivers/ata/pata_parport/
H A Depia.c22 * mode codes: 0 nybble reads on port 1, 8-bit writes
23 * 1 5/3 reads on ports 1 & 2, 8-bit writes
35 * cont = 1 IDE control registers
48 w0(r); w2(1); w2(3); w0(r); in epia_read_regr()
49 a = r1(); w2(1); b = r1(); w2(4); in epia_read_regr()
51 case 1: in epia_read_regr()
53 w0(r); w2(1); w0(r & 0x37); in epia_read_regr()
59 w0(r); w2(1); w2(0X21); w2(0x23); in epia_read_regr()
69 return -1; in epia_read_regr()
80 case 1: in epia_write_regr()
[all …]
H A Depat.c32 * cont = 1 IDE control registers
43 case 1: in epat_write_regr()
45 w0(0x60+r); w2(1); w0(val); w2(4); in epat_write_regr()
64 w0(r); w2(1); w2(3); in epat_read_regr()
67 case 1: in epat_read_regr()
68 w0(0x40+r); w2(1); w2(4); in epat_read_regr()
72 w0(0x20+r); w2(1); w2(0x25); in epat_read_regr()
82 return -1; /* never gets here */ in epat_read_regr()
87 int k, ph, a, b; in epat_read_block() local
92 w0(7); w2(1); w2(3); w0(0xff); in epat_read_block()
[all …]
/openbmc/qemu/util/
H A Dbitmap.c43 long k, lim = bits/BITS_PER_LONG; in slow_bitmap_empty() local
45 for (k = 0; k < lim; ++k) { in slow_bitmap_empty()
46 if (bitmap[k]) { in slow_bitmap_empty()
51 if (bitmap[k] & BITMAP_LAST_WORD_MASK(bits)) { in slow_bitmap_empty()
56 return 1; in slow_bitmap_empty()
61 long k, lim = bits/BITS_PER_LONG; in slow_bitmap_full() local
63 for (k = 0; k < lim; ++k) { in slow_bitmap_full()
64 if (~bitmap[k]) { in slow_bitmap_full()
70 if (~bitmap[k] & BITMAP_LAST_WORD_MASK(bits)) { in slow_bitmap_full()
75 return 1; in slow_bitmap_full()
[all …]

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