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/openbmc/linux/include/linux/platform_data/
H A Dshmob_drm.h22 SHMOB_DRM_IFACE_RGB8, /* 24bpp, 8:8:8 */
23 SHMOB_DRM_IFACE_RGB9, /* 18bpp, 9:9 */
24 SHMOB_DRM_IFACE_RGB12A, /* 24bpp, 12:12 */
25 SHMOB_DRM_IFACE_RGB12B, /* 12bpp */
26 SHMOB_DRM_IFACE_RGB16, /* 16bpp */
27 SHMOB_DRM_IFACE_RGB18, /* 18bpp */
28 SHMOB_DRM_IFACE_RGB24, /* 24bpp */
29 SHMOB_DRM_IFACE_YUV422, /* 16bpp */
30 SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */
31 SHMOB_DRM_IFACE_SYS8B, /* 18bpp, 8:8:2 */
[all …]
/openbmc/linux/include/video/
H A Dsh_mobile_lcdc.h75 #define LDDFR_CF1 (1 << 18)
105 RGB8 = LDMT1R_MIFTYP_RGB8, /* 24bpp, 8:8:8 */
106 RGB9 = LDMT1R_MIFTYP_RGB9, /* 18bpp, 9:9 */
107 RGB12A = LDMT1R_MIFTYP_RGB12A, /* 24bpp, 12:12 */
108 RGB12B = LDMT1R_MIFTYP_RGB12B, /* 12bpp */
109 RGB16 = LDMT1R_MIFTYP_RGB16, /* 16bpp */
110 RGB18 = LDMT1R_MIFTYP_RGB18, /* 18bpp */
111 RGB24 = LDMT1R_MIFTYP_RGB24, /* 24bpp */
112 YUV422 = LDMT1R_MIFTYP_YCBCR, /* 16bpp */
113 SYS8A = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8A, /* 24bpp, 8:8:8 */
[all …]
/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c165 /* PPS 18, 19 */ in drm_dsc_pps_payload_pack()
320 * For 6bpp, RC Buffer threshold 12 and 13 need a different value in drm_dsc_set_rc_buf_thresh()
342 u8 bpp; member
347 #define DSC_BPP(bpp) ((bpp) << 4) argument
351 * to DSC 1.1 fractional bpp underflow SCR (DSC_v1.1_E1.pdf)
357 .bpp = DSC_BPP(6), .bpc = 8,
367 .bpp = DSC_BPP(8), .bpc = 8,
377 .bpp = DSC_BPP(8), .bpc = 10,
391 .bpp = DSC_BPP(8), .bpc = 12,
395 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 19, -10 },
[all …]
/openbmc/linux/Documentation/fb/
H A Darkfb.rst19 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
20 * 8 bpp pseudocolor mode (with 18bit palette)
21 * 16 bpp truecolor modes (RGB 555 and RGB 565)
22 * 24 bpp truecolor mode (RGB 888)
23 * 32 bpp truecolor mode (RGB 888)
24 * text mode (activated by bpp = 0)
36 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
54 * support for fontwidths != 8 in 4 bpp modes
H A Ds3fb.rst26 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
27 * 8 bpp pseudocolor mode (with 18bit palette)
28 * 16 bpp truecolor modes (RGB 555 and RGB 565)
29 * 24 bpp truecolor mode (RGB 888) on (only on Virge VX)
30 * 32 bpp truecolor mode (RGB 888) on (not on Virge VX)
31 * text mode (activated by bpp = 0)
45 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
62 * 24 bpp mode support on more cards
63 * support for fontwidths != 8 in 4 bpp modes
H A Dvt8623fb.rst18 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
19 * 8 bpp pseudocolor mode (with 18bit palette)
20 * 16 bpp truecolor mode (RGB 565)
21 * 32 bpp truecolor mode (RGB 888)
22 * text mode (activated by bpp = 0)
33 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
49 * support for fontwidths != 8 in 4 bpp modes
/openbmc/linux/drivers/gpu/drm/gma500/
H A Doaktrail.h76 struct oaktrail_timing_info DTD;/*18 bytes, Standard definition */
89 /* Bit0: 16bpp (not supported in LNC), */
90 /* Bit1: 18bpp loosely packed, */
91 /* Bit2: 18bpp packed, */
92 /* Bit3: 24bpp */
105 struct oaktrail_timing_info DTD;/*18 bytes, Standard definition */
119 /* Bit0: 16bpp (not supported in LNC), */
120 /* Bit1: 18bpp loosely packed, */
121 /* Bit2: 18bpp packed, */
122 /* Bit3: 24bpp */
H A Dintel_bios.c55 dev_priv->edp.bpp = 18; in parse_edp()
59 dev_priv->edp.bpp); in parse_edp()
67 dev_priv->edp.bpp = 18; in parse_edp()
70 dev_priv->edp.bpp = 24; in parse_edp()
73 dev_priv->edp.bpp = 30; in parse_edp()
102 DRM_DEBUG_KMS("VBT reports EDP: Lane_count %d, Lane_rate %d, Bpp %d\n", in parse_edp()
103 dev_priv->edp.lanes, dev_priv->edp.rate, dev_priv->edp.bpp); in parse_edp()
/openbmc/u-boot/drivers/video/
H A Dmxsfb.c40 * video=ctfb:x:800,y:480,depth:18,mode:0,pclk:30066,
50 struct ctfb_res_modes *mode, int bpp) in mxs_lcd_init() argument
62 switch (bpp) { in mxs_lcd_init()
68 case 18: in mxs_lcd_init()
155 int bpp = -1; in video_hw_init() local
169 bpp = video_get_params(&mode, penv); in video_hw_init()
173 mode.xres, mode.yres, bpp); in video_hw_init()
180 switch (bpp) { in video_hw_init()
182 case 18: in video_hw_init()
195 printf("MXSFB: Invalid BPP specified! (bpp = %i)\n", bpp); in video_hw_init()
[all …]
H A Dssd2828.h62 * in such a way that 18bpp and 24bpp configurations are completely
65 * Depending on the color depth, this must be set to 16, 18 or 24.
95 * Setting this to 1 enforces packing of 18bpp pixel data in 24bpp
H A Danx9804.c26 * @bpp: Bits per pixel, must be 18 or 24
28 void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp) in anx9804_init() argument
36 if (bpp == 18) in anx9804_init()
/openbmc/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_lcdc_encoder.c64 int bpp, nchan, swap; in setup_phy() local
69 bpp = 3 * connector->display_info.bpc; in setup_phy()
71 if (!bpp) in setup_phy()
72 bpp = 18; in setup_phy()
78 switch (bpp) { in setup_phy()
133 case 18: in setup_phy()
177 DRM_DEV_ERROR(dev->dev, "unknown bpp: %d\n", bpp); in setup_phy()
327 /* TODO: hard-coded for 18bpp: */ in mdp4_lcdc_encoder_enable()
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dsc_1_2.c95 u32 bpp; in dpu_hw_dsc_config_1_2() local
123 data |= (_dsc_calc_output_buf_max_addr(hw_dsc, num_active_slice_per_enc) << 18); in dpu_hw_dsc_config_1_2()
135 bpp = dsc->bits_per_pixel; in dpu_hw_dsc_config_1_2()
136 /* as per hw requirement bpp should be programmed in dpu_hw_dsc_config_1_2()
140 bpp = 2 * bpp; in dpu_hw_dsc_config_1_2()
142 data |= bpp << 10; in dpu_hw_dsc_config_1_2()
302 (rc[3].range_bpg_offset << 18) | in dpu_hw_dsc_config_thresh_1_2()
321 (rc[8].range_bpg_offset << 18) | in dpu_hw_dsc_config_thresh_1_2()
340 (rc[13].range_bpg_offset << 18) | in dpu_hw_dsc_config_thresh_1_2()
/openbmc/linux/drivers/gpu/drm/msm/dp/
H A Ddp_link.h75 * mdss_dp_test_bit_depth_to_bpp() - convert test bit depth to bpp
78 * Returns the bits per pixel (bpp) to be used corresponding to the
92 return 18; in dp_link_bit_depth_to_bpp()
127 u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp);
H A Ddp_panel.c140 const u32 max_supported_bpp = 30, min_supported_bpp = 18; in dp_panel_get_supported_bpp()
141 u32 bpp, data_rate_khz; in dp_panel_get_supported_bpp() local
143 bpp = min(mode_edid_bpp, max_supported_bpp); in dp_panel_get_supported_bpp()
149 if (mode_pclk_khz * bpp <= data_rate_khz) in dp_panel_get_supported_bpp()
150 return bpp; in dp_panel_get_supported_bpp()
151 bpp -= 6; in dp_panel_get_supported_bpp()
152 } while (bpp > min_supported_bpp); in dp_panel_get_supported_bpp()
257 u32 bpp; in dp_panel_get_mode_bpp() local
267 bpp = dp_link_bit_depth_to_bpp( in dp_panel_get_mode_bpp()
270 bpp = dp_panel_get_supported_bpp(dp_panel, mode_edid_bpp, in dp_panel_get_mode_bpp()
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/libsdl/libsdl-1.2.15/
H A DCVE-2022-34568.patch7 Date: Sat, 18 Jun 2022 14:55:00 +0300
21 if ( hwdata->image != NULL && hwdata->image->pitches[0] != (width*bpp) ) {
24 width = hwdata->image->pitches[0] / bpp;
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dsi_reg.h50 /* 8 BPP */
52 /* 16 BPP */
59 /* 32 BPP */
81 # define SI_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18)
/openbmc/linux/drivers/media/platform/nxp/
H A Dimx7-media-csi.c49 #define BIT_RXFF_INTEN BIT(18)
101 #define BIT_RXFF_INT BIT(18)
115 /* csi control reg 18 */
126 #define BIT_MASK_OPTION_FIRST_FRAME (0 << 18)
127 #define BIT_MASK_OPTION_CSI_EN (1 << 18)
128 #define BIT_MASK_OPTION_SECOND_FRAME (2 << 18)
129 #define BIT_MASK_OPTION_ON_DATA (3 << 18)
185 int bpp; /* total bpp */ member
820 * in single (8bpp) or double (16bpp) component modes. Image format variants
850 .bpp = 16,
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dpxafb.c241 /* calculate pixel depth, transparency bit included, >=16bpp formats _only_ */
248 /* calculate 4-bit BPP value for LCCR3 and OVLxC1 */
251 int bpp = -EINVAL; in pxafb_var_to_bpp() local
254 case 1: bpp = 0; break; in pxafb_var_to_bpp()
255 case 2: bpp = 1; break; in pxafb_var_to_bpp()
256 case 4: bpp = 2; break; in pxafb_var_to_bpp()
257 case 8: bpp = 3; break; in pxafb_var_to_bpp()
258 case 16: bpp = 4; break; in pxafb_var_to_bpp()
261 case 18: bpp = 6; break; /* 18-bits/pixel packed */ in pxafb_var_to_bpp()
262 case 19: bpp = 8; break; /* 19-bits/pixel packed */ in pxafb_var_to_bpp()
[all …]
H A Datafb.c125 short bpp; member
221 2, 130, 66, 194, 34, 162, 98, 226, 18, 146, 82, 210, 50, 178, 114, 242,
497 "vga", 60, 640, 480, 39721, 42, 18, 31, 11, 100, 3,
501 "vga70", 70, 640, 400, 39721, 42, 18, 31, 11, 100, 3,
511 "falh", 60, 896, 608, 32000, 18, 42, 31, 1, 96,3,
583 int bpp = var->bits_per_pixel; in tt_decode_var() local
588 if (bpp > 1 || xres > sttt_xres * 2 || yres > tt_yres * 2) in tt_decode_var()
593 bpp = 1; in tt_decode_var()
595 if (bpp > 8 || xres > sttt_xres || yres > tt_yres) in tt_decode_var()
597 if (bpp > 4) { in tt_decode_var()
[all …]
H A Dau1100fb.h78 u32 bpp; /* Maximum depth supported */ member
125 #define LCD_CONTROL_SBPPF_BIT 18
202 #define LCD_CLKCONTROL_IB (1<<18)
277 .bpp = 16,
290 .bpp = 16,
301 .bpp = 16,
328 .bpp = 4,
350 .bpp = 16,
362 .bpp = 16,
H A Ds3c-fb.c116 * @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
118 * valid_bpp bit x is set if (x+1)BPP is supported.
225 * @bpp: The bit depth.
227 static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp) in s3c_fb_validate_win_bpp() argument
229 return win->variant.valid_bpp & VALID_BPP(bpp); in s3c_fb_validate_win_bpp()
252 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n", in s3c_fb_check_var()
286 var->transp.offset = 18; in s3c_fb_check_var()
289 case 18: in s3c_fb_check_var()
302 /* 16 bpp, 565 format */ in s3c_fb_check_var()
318 /* our 24bpp is unpacked, so 32bpp */ in s3c_fb_check_var()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_opp.c100 * 1) set truncation depth: 0 for 18 bpp or 1 for 24 bpp
145 * 1) set truncation depth: 0 for 18 bpp or 1 for 24 bpp
187 * 2) set spatial dithering depth: 0 for 18bpp or 1 for 24bpp
/openbmc/linux/fs/xfs/
H A Dxfs_buf.h39 #define _XBF_LOGRECOVERY (1u << 18)/* log recovery buffer */
219 int nmaps, xfs_buf_flags_t flags, struct xfs_buf **bpp);
221 int nmaps, xfs_buf_flags_t flags, struct xfs_buf **bpp,
233 struct xfs_buf **bpp) in xfs_buf_incore() argument
237 return xfs_buf_get_map(target, &map, 1, XBF_INCORE | flags, bpp); in xfs_buf_incore()
245 struct xfs_buf **bpp) in xfs_buf_get() argument
249 return xfs_buf_get_map(target, &map, 1, 0, bpp); in xfs_buf_get()
258 struct xfs_buf **bpp, in xfs_buf_read() argument
263 return xfs_buf_read_map(target, &map, 1, flags, bpp, ops, in xfs_buf_read()
279 xfs_buf_flags_t flags, struct xfs_buf **bpp);
[all …]
/openbmc/u-boot/include/
H A Dvideo_fb.h14 * 04-18-2002 Rewritten for U-Boot <fgottschling@eltec.de>.
63 unsigned int bpp, /* bytes per pixel */
75 unsigned int bpp, /* bytes per pixel */

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