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/openbmc/u-boot/include/configs/
H A Dhighbank.h13 #define CONFIG_SYS_TIMER_RATE (150000000/256)
22 #define CONFIG_PL011_CLOCK 150000000
H A Dbmips_bcm6358.h10 #define CONFIG_SYS_MIPS_TIMER_FREQ 150000000
/openbmc/linux/arch/arm/mach-omap1/
H A Dopp_data.c39 { 150000000, 12000000, 150000000, 0x010a, 0x2cb0, /* 1/1/1/2/4/4 */
/openbmc/linux/drivers/video/fbdev/via/
H A DtblDPASetting.h16 #define DPA_CLK_150M 150000000
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-fastrhino-r66s.dts23 max-frequency = <150000000>;
H A Drk3328-nanopi-r2c-plus.dts24 max-frequency = <150000000>;
H A Drk3328-evb.dts238 max-frequency = <150000000>;
251 max-frequency = <150000000>;
H A Drk3328-roc-cc.dts137 max-frequency = <150000000>;
327 max-frequency = <150000000>;
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-tinker-s.dts21 max-frequency = <150000000>;
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dpata-arasan.txt16 150000000
/openbmc/linux/drivers/clk/mvebu/
H A Dorion.c35 return 150000000; in mv88f5181_get_tclk_freq()
103 return 150000000; in mv88f5182_get_tclk_freq()
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-peripherals-opp.dtsi103 opp-150000000 {
105 opp-hz = /bits/ 64 <150000000>;
298 opp-150000000-1100 {
300 opp-hz = /bits/ 64 <150000000>;
874 opp-150000000-1000 {
876 opp-hz = /bits/ 64 <150000000>;
/openbmc/u-boot/arch/arm/dts/
H A Drk3328.dtsi408 <150000000>, <75000000>,
409 <75000000>, <150000000>,
418 <150000000>, <50000000>,
425 max-frequency = <150000000>;
436 max-frequency = <150000000>;
448 max-frequency = <150000000>;
502 max-frequency = <150000000>;
/openbmc/linux/arch/mips/lantiq/
H A Dclk.h23 #define CLOCK_150M 150000000
/openbmc/linux/Documentation/devicetree/bindings/mips/brcm/
H A Dsoc.yaml81 mips-hpt-frequency = <150000000>;
/openbmc/linux/arch/mips/boot/dts/brcm/
H A Dbcm3368.dtsi14 mips-hpt-frequency = <150000000>;
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dbrcm,sdhci-brcmstb.yaml58 maximum: 150000000
H A Drockchip-dw-mshc.yaml122 max-frequency = <150000000>;
/openbmc/u-boot/include/
H A Ddwmmc.h266 * @max_clk: Maximum supported clock speed in HZ (e.g. 150000000)
296 * @max_clk: Maximum supported clock speed in HZ (e.g. 150000000)
/openbmc/u-boot/board/freescale/t208xqds/
H A Dspl.c40 return 150000000; in get_board_sys_clk()
/openbmc/u-boot/board/freescale/t4qds/
H A Dspl.c41 return 150000000; in get_board_sys_clk()
/openbmc/u-boot/board/freescale/t102xqds/
H A Dspl.c40 return 150000000; in get_board_sys_clk()
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3036.h15 #define CORE_PERI_HZ 150000000
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dite,it6505.yaml137 link-frequencies = /bits/ 64 <150000000>;
/openbmc/qemu/hw/arm/
H A Dhighbank.c279 qdev_prop_set_uint32(dev, "freq0", 150000000); in calxeda_init()
280 qdev_prop_set_uint32(dev, "freq1", 150000000); in calxeda_init()

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