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/openbmc/linux/arch/x86/crypto/
H A Dsha256-ssse3-asm.S150 ## compute W[-16] + W[-7] 4 at a time
153 ror $(25-11), y0 # y0 = e >> (25-11)
155 palignr $4, X2, XTMP0 # XTMP0 = W[-7]
157 xor e, y0 # y0 = e ^ (e >> (25-11))
159 ror $(11-6), y0 # y0 = (e >> (11-6)) ^ (e >> (25-6))
163 paddd X0, XTMP0 # XTMP0 = W[-7] + W[-16]
164 xor e, y0 # y0 = e ^ (e >> (11-6)) ^ (e >> (25-6))
168 palignr $4, X0, XTMP1 # XTMP1 = W[-15]
170 ror $6, y0 # y0 = S1 = (e>>6) & (e>>11) ^ (e>>25)
172 movdqa XTMP1, XTMP2 # XTMP2 = W[-15]
[all …]
H A Dsha256-avx-asm.S156 ## compute W[-16] + W[-7] 4 at a time
159 MY_ROR (25-11), y0 # y0 = e >> (25-11)
161 vpalignr $4, X2, X3, XTMP0 # XTMP0 = W[-7]
163 xor e, y0 # y0 = e ^ (e >> (25-11))
165 MY_ROR (11-6), y0 # y0 = (e >> (11-6)) ^ (e >> (25-6))
168 vpaddd X0, XTMP0, XTMP0 # XTMP0 = W[-7] + W[-16]
169 xor e, y0 # y0 = e ^ (e >> (11-6)) ^ (e >> (25-6))
173 vpalignr $4, X0, X1, XTMP1 # XTMP1 = W[-15]
175 MY_ROR 6, y0 # y0 = S1 = (e>>6) & (e>>11) ^ (e>>25)
179 add _XFER(%rsp), y2 # y2 = k + w + S1 + CH
[all …]
H A Dsha256-avx2-asm.S159 rorx $11, e, y1 # y1 = e >> 11 # S1B
161 addl \disp(%rsp, SRND), h # h = k + w + h # --
163 vpalignr $4, X2, X3, XTMP0 # XTMP0 = W[-7]
167 xor y1, y0 # y0 = (e>>25) ^ (e>>11) # S1
169 vpaddd X0, XTMP0, XTMP0 # XTMP0 = W[-7] + W[-16]# y1 = (e >> 6)# S1
173 xor y1, y0 # y0 = (e>>25) ^ (e>>11) ^ (e>>6) # S1
175 add h, d # d = k + w + h + d # --
178 vpalignr $4, X0, X1, XTMP1 # XTMP1 = W[-15]
191 add y1, h # h = k + w + h + S0 # --
193 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
[all …]
/openbmc/linux/arch/powerpc/kernel/
H A Dalign.c51 INVALID, /* 0 00 11 */
55 { 2, LD+SE }, /* 0 01 11: evlhhossplat[x] */
59 { 4, LD+SE }, /* 0 10 11: evlwhos[x] */
60 { 4, LD+E4 }, /* 0 11 00: evlwwsplat[x] */
61 INVALID, /* 0 11 01 */
62 { 4, LD }, /* 0 11 10: evlwhsplat[x] */
63 INVALID, /* 0 11 11 */
68 INVALID, /* 1 00 11 */
72 INVALID, /* 1 01 11 */
76 INVALID, /* 1 10 11 */
[all …]
/openbmc/linux/drivers/staging/ks7010/
H A Dks_hostif.h93 * @DOT11_RTS_THRESHOLD: RTS Threshold (R/W)
94 * @DOT11_FRAGMENTATION_THRESHOLD: Fragment Threshold (R/W)
95 * @DOT11_PRIVACY_INVOKED: WEP ON/OFF (W)
96 * @DOT11_WEP_DEFAULT_KEY_ID: WEP Index (W)
97 * @DOT11_WEP_DEFAULT_KEY_VALUE1: WEP Key#1(TKIP AES: PairwiseTemporalKey) (W)
98 * @DOT11_WEP_DEFAULT_KEY_VALUE2: WEP Key#2(TKIP AES: GroupKey1) (W)
99 * @DOT11_WEP_DEFAULT_KEY_VALUE3: WEP Key#3(TKIP AES: GroupKey2) (W)
100 * @DOT11_WEP_DEFAULT_KEY_VALUE4: WEP Key#4 (W)
105 * @LOCAL_AP_SEARCH_INTERVAL: AP search interval (R/W)
106 * @LOCAL_CURRENTADDRESS: MAC Address change (W)
[all …]
/openbmc/openbmc/meta-ibm/recipes-phosphor/chassis/power-workarounds/witherspoon/
H A Dpower-workarounds.sh57 i2cset -y 11 0x64 0x00 0x0E i
58 i2cset -y 11 0x64 0x02 0x16 i
59 i2cset -y 11 0x64 0x00 0x0F i
60 i2cset -y 11 0x64 0x02 0x16 i
64 i2cset -y 11 0x64 0xF7 0x00 i
65 i2cset -y 11 0x64 0xF8 0x15 0x6E 0x80 0x08 0x00 0x00 0x00 0x40 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0…
67 i2cset -y 11 0x64 0xF7 0x01 i
68 i2cset -y 11 0x64 0xF8 0x15 0x16 0x80 0x08 0x00 0x00 0x20 0x40 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0…
71 REV=$(i2cget -y 11 0x64 0x9B i 2|cut -f2 -d' ')
75 i2cset -y 11 0x64 0x00 0x07 i
[all …]
/openbmc/linux/drivers/net/ethernet/marvell/
H A Dskge.h135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
191 IS_XS1_B = 1<<11, /* Q_XS1 End of Buffer */
219 IS_IRQ_MST_ERR = 1<<11, /* IRQ master error detected */
391 PA_CLR_TO_RX2 = 1<<11,/* Clear IRQ Packet Timeout RX2 */
528 /* GPHY address (bits 15..11 of SMI control reg) */
566 MFF_ENA_TIM_PAT = 1<<11, /* Enable Timing Patch */
718 CSR_DWRITE_RUN = 1<<11, /* Release Descr Write SM */
903 XMR_FS_BURST = 1<<11, /* Bit 11: Burst Mode */
930 PHY_XMAC_CTRL = 0x00,/* 16 bit r/w PHY Control Register */
931 PHY_XMAC_STAT = 0x01,/* 16 bit r/w PHY Status Register */
[all …]
H A Dsky2.h52 PCI_PATCH_DIR = 0xfL<<8, /* Bit 11.. 8: Ext Patches dir 3..0 */
70 P_CLK_COR_LNK1_D3_DIS = 1<<11,/* Disable Clock Core Link1 D3 */
230 PSM_CONFIG_REG1_DIS_FF_CHIAN_SND_INTA = 1<<11, /* Disable flip-flop chain for sndmsg_inta */
310 * The HW-Spec. calls this registers Timeout Value 0..11. But this names are
374 Y2_CLK_RUN_ENA = 1<<11,/* CLK_RUN Enable (YUKON-2 only) */
418 Y2_IS_IRQ_MAC2 = 1<<11, /* Interrupt from MAC 2 */
449 IS_IRQ_MST_ERR = 1<<11, /* IRQ master error detected */
474 Y2_IS_PAR_MAC2 = 1<<11, /* MAC hardware fault interrupt */
521 GLB_GPIO_TEST_SEL_MSK = 3<<11, /* Testmode Select */
522 GLB_GPIO_TEST_SEL_BASE = 1<<11,
[all …]
/openbmc/qemu/target/mips/tcg/
H A Dmsa_helper.c59 * | NLOC.W | Vector Leading Ones Count (word) |
63 * | NLZC.W | Vector Leading Zeros Count (word) |
67 * | PCNT.W | Vector Population Count (word) |
114 pwd->b[11] = msa_nloc_df(DF_BYTE, pws->b[11]); in helper_msa_nloc_b()
141 pwd->w[0] = msa_nloc_df(DF_WORD, pws->w[0]); in helper_msa_nloc_w()
142 pwd->w[1] = msa_nloc_df(DF_WORD, pws->w[1]); in helper_msa_nloc_w()
143 pwd->w[2] = msa_nloc_df(DF_WORD, pws->w[2]); in helper_msa_nloc_w()
144 pwd->w[3] = msa_nloc_df(DF_WORD, pws->w[3]); in helper_msa_nloc_w()
172 pwd->b[11] = msa_nlzc_df(DF_BYTE, pws->b[11]); in helper_msa_nlzc_b()
199 pwd->w[0] = msa_nlzc_df(DF_WORD, pws->w[0]); in helper_msa_nlzc_w()
[all …]
/openbmc/linux/arch/arm/probes/kprobes/
H A Dtest-thumb.c66 TEST_R( "lsls r0, r",7,VAL2,", #11") in kprobe_thumb16_test_cases()
68 TEST_R( "lsrs r0, r",7,VAL2,", #11") in kprobe_thumb16_test_cases()
70 TEST_R( "asrs r0, r",7,VAL2,", #11") in kprobe_thumb16_test_cases()
97 DATA_PROCESSING16("lsls",11) in kprobe_thumb16_test_cases()
98 DATA_PROCESSING16("lsrs",11) in kprobe_thumb16_test_cases()
99 DATA_PROCESSING16("asrs",11) in kprobe_thumb16_test_cases()
102 DATA_PROCESSING16("rors",11) in kprobe_thumb16_test_cases()
262 TEST_POPPC("pop {r1,r3,r5,r7,pc}",11*4) in kprobe_thumb16_test_cases()
479 TEST_RR(op s".w r0, r",1, VAL1,", r",2, val, "") \ in kprobe_thumb32_test_cases()
486 TEST_R( op s" r0, r",11,VAL1,", #0x00010001") \ in kprobe_thumb32_test_cases()
[all …]
/openbmc/linux/arch/mips/include/asm/
H A Dasmmacro.h235 .word 0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
239 .word 0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
266 ld.b $w\wd, \off(\base)
275 ld.h $w\wd, \off(\base)
284 ld.w $w\wd, \off(\base)
293 ld.d $w\wd, \off(\base)
302 st.b $w\wd, \off(\base)
311 st.h $w\wd, \off(\base)
320 st.w $w\wd, \off(\base)
329 st.d $w\wd, \off(\base)
[all …]
/openbmc/linux/arch/powerpc/crypto/
H A Dsha256-spe-asm.S101 #define R_LOAD_W(a, b, c, d, e, f, g, h, w, off) \ argument
102 LOAD_DATA(w, off) /* 1: W */ \
104 rotrwi rT1,e,11; /* 1: S1' = e rotr 11 */ \
113 add rT3,rT3,w; /* 1: temp1' = ch + w */ \
122 evmergelo w,w,w; /* shift W */ \
126 LOAD_DATA(w, off+4) /* 2: W */ \
130 rotrwi rT1,d,11; /* 2: S1' = e rotr 11 */ \
140 add rT3,rT3,w; /* 2: temp1' = ch + w */ \
158 evmergelohi rT0,w0,w1; /* w[-15] */ \
159 rotrwi rT3,e,11; /* 1: S1' = e rotr 11 */ \
[all …]
H A Dmd5-asm.S62 LOAD_DATA(w0, off) /* W */ \
66 LOAD_DATA(w1, off+4) /* W */ \
68 addi w0,w0,k0l; /* 1: wk = w + k */ \
70 addis w0,w0,k0h; /* 1: wk = w + k' */ \
71 addis w1,w1,k1h; /* 2: wk = w + k */ \
73 addi w1,w1,k1l; /* 2: wk = w + k' */ \
88 addi w0,w0,k0l; /* 1: wk = w + k */ \
90 addis w0,w0,k0h; /* 1: wk = w + k' */ \
92 addi w1,w1,k1l; /* 2: wk = w + k */ \
94 addis w1,w1,k1h; /* 2: wk = w + k' */ \
[all …]
/openbmc/linux/arch/arm/mm/
H A Dproc-macros.S128 * 1011 0 0 1 r/w no acc
130 * 11x0 1 1 1 r/o r/o
131 * 1111 0 1 1 r/w r/w
201 * 1011 0x55 r/w no acc
202 * 110x 0xaa r/w r/o
203 * 11x0 0xaa r/w r/o
204 * 1111 0xff r/w r/w
244 * 1011 01 r/w no acc
245 * 110x 10 r/w r/o
246 * 11x0 10 r/w r/o
[all …]
/openbmc/qemu/target/arm/tcg/
H A Da64.decode25 %hl 11:1 21:1
26 %hlm 11:1 20:2
105 SUBS_i . 11 100010 0 ............ ..... ..... @addsub_imm
106 SUBS_i . 11 100010 1 ............ ..... ..... @addsub_imm12
128 ANDS_i . 11 100100 . ...... ...... ..... ..... @logic_imm_64
129 ANDS_i . 11 100100 . ...... ...... ..... ..... @logic_imm_32
141 MOVK . 11 100101 .. ................ ..... @movw_64
142 MOVK . 11 100101 .. ................ ..... @movw_32
277 SYS 1101 0101 00 l:1 11 op1:3 crn:4 crm:4 op2:3 rt:5 op0=3
284 SMC 1101 0100 000 ................ 000 11 @i16
[all …]
H A Dm-nocp.decode41 &vldr_sysreg rn reg imm a w p
62 # P=0 W=0 is SEE "Related encodings", so split into two patterns
63 VLDR_sysreg ---- 110 1 . . w:1 1 .... ... 0 111 11 ....... @vldr_sysreg p=1
64 VLDR_sysreg ---- 110 0 . . 1 1 .... ... 0 111 11 ....... @vldr_sysreg p=0 w=1
65 VSTR_sysreg ---- 110 1 . . w:1 0 .... ... 0 111 11 ....... @vldr_sysreg p=1
66 VSTR_sysreg ---- 110 0 . . 1 0 .... ... 0 111 11 ....... @vldr_sysreg p=0 w=1
H A Dmve.decode40 &vldr_vstr rn qd imm p a w size l u
54 &vldst_sg_imm qd qm a w imm
55 &vldst_il qd rn size pat w
68 @vldst_sg_imm .... .... a:1 . w:1 . .... .... .... . imm:7 &vldst_sg_imm \
72 @vldst_il .... .... .. w:1 . rn:4 .... ... size:2 pat:2 ..... &vldst_il \
158 # for these P=0 W=0 is 'related encoding'; sz=11 is 'related encoding'
159 # This means we need to expand out to multiple patterns for P, W, SZ.
164 p=0 w=1 size=1
165 VLDSTB_H 111 . 110 1 a:1 0 w:1 . 0 ... ... 0 111 01 ....... @vldst_wn \
168 p=0 w=1 size=2
[all …]
/openbmc/linux/drivers/input/joystick/
H A Dwalkera0701.c62 static inline void walkera0701_parse_frame(struct walkera_dev *w) in walkera0701_parse_frame() argument
70 crc1 += w->buf[i] & 7; in walkera0701_parse_frame()
71 crc2 += (w->buf[i] & 8) >> 3; in walkera0701_parse_frame()
73 if ((w->buf[10] & 7) != (crc1 & 7)) in walkera0701_parse_frame()
75 if (((w->buf[10] & 8) >> 3) != (((crc1 >> 3) + crc2) & 1)) in walkera0701_parse_frame()
77 for (crc1 = crc2 = 0, i = 11; i < 23; i++) { in walkera0701_parse_frame()
78 crc1 += w->buf[i] & 7; in walkera0701_parse_frame()
79 crc2 += (w->buf[i] & 8) >> 3; in walkera0701_parse_frame()
81 if ((w->buf[23] & 7) != (crc1 & 7)) in walkera0701_parse_frame()
83 if (((w->buf[23] & 8) >> 3) != (((crc1 >> 3) + crc2) & 1)) in walkera0701_parse_frame()
[all …]
/openbmc/openbmc/meta-fii/meta-kudo/recipes-kudo/kudo-sys-utility/kudo-cmd/
H A Dkudo-ras.sh10 REG60=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x60 w) # GPI Data Set
11 REG61=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x61 w) # GPI DATA Set #0
12 REG62=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x62 w) # GPI DATA Set #1
13 REG63=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x63 w) # GPI DATA Set #2
14 REG64=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x64 w) # GPI DATA Set #3
22 MemCE=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x90 w)
23 MemUE=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x93 w)
24 CoreCE=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x80 w)
25 CoreUE=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0x83 w)
26 PCIeCE=$(i2cget -f -y "${I2C_S0_SMPRO[0]}" 0x"${I2C_S0_SMPRO[1]}" 0xc0 w)
[all …]
/openbmc/linux/drivers/dma/dw-axi-dmac/
H A Ddw-axi-dmac.h153 #define DMAC_CFG 0x010 /* R/W DMAC Configuration */
154 #define DMAC_CHEN 0x018 /* R/W DMAC Channel Enable */
155 #define DMAC_CHEN_L 0x018 /* R/W DMAC Channel Enable 00-31 */
156 #define DMAC_CHEN_H 0x01C /* R/W DMAC Channel Enable 32-63 */
157 #define DMAC_CHSUSPREG 0x020 /* R/W DMAC Channel Suspend */
158 #define DMAC_CHABORTREG 0x028 /* R/W DMAC Channel Abort */
160 #define DMAC_COMMON_INTCLEAR 0x038 /* W DMAC Interrupt Clear */
162 #define DMAC_COMMON_INTSIGNAL_ENA 0x048 /* R/W DMAC Interrupt Signal Enable */
167 #define CH_SAR 0x000 /* R/W Chan Source Address */
168 #define CH_DAR 0x008 /* R/W Chan Destination Address */
[all …]
/openbmc/linux/include/video/
H A Dpm3fb.h134 #define PM3VideoControl_STEREO_ENABLE (1 << 11)
226 #define PM3VideoOverlayWidth_WIDTH(w) (((w) & 0xfff) << 0) argument
312 #define PM3RD_ColorFormat_232_FRONTOFF_COLOR (11 << 0)
555 #define PM3FBDestReadBufferWidth_Width(w) ((w) & 0x0fff) argument
573 #define PM3FBDestReadEnables_R3 (1 << 11)
590 #define PM3FBDestReadMode_Enable3 (1 << 11)
612 #define PM3FBSourceReadBufferWidth_Width(w) ((w) & 0x0fff) argument
622 #define PM3FBSourceReadMode_Blocking (1 << 11)
626 #define PM3FBSourceReadMode_WrapX(w) (((w) & 0xf) << 16) argument
627 #define PM3FBSourceReadMode_WrapY(w) (((w) & 0xf) << 20) argument
[all …]
/openbmc/linux/Documentation/driver-api/media/drivers/
H A Dtuners.rst69 MF: BG LL w/ Secam (Multi France)
75 MK3 series introduced in 2002 w/ PHILIPS_MK3_API
95 FR5: w/ FM radio
101 - TPI8NSR11 : NTSC J/M (TPI8NSR01 w/FM) (P,210/497)
102 - TPI8PSB11 : PAL B/G (TPI8PSB01 w/FM) (P,170/450)
103 - TAPC-I701 : PAL I (TAPC-I001 w/FM) (P,170/450)
104 - TPI8PSB12 : PAL D/K+B/G (TPI8PSB02 w/FM) (P,170/450)
105 - TAPC-H701P: NTSC_JP (TAPC-H001P w/FM) (L,170/450)
106 - TAPC-G701P: PAL B/G (TAPC-G001P w/FM) (L,170/450)
107 - TAPC-W701P: PAL I (TAPC-W001P w/FM) (L,170/450)
[all …]
/openbmc/linux/include/uapi/linux/
H A Dswitchtec_ioctl.h33 #define SWITCHTEC_IOCTL_PART_VENDOR6 11
93 #define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC 11
147 _IOR('W', 0x40, struct switchtec_ioctl_flash_info)
149 _IOWR('W', 0x41, struct switchtec_ioctl_flash_part_info)
151 _IOR('W', 0x42, struct switchtec_ioctl_event_summary)
153 _IOR('W', 0x42, struct switchtec_ioctl_event_summary_legacy)
155 _IOWR('W', 0x43, struct switchtec_ioctl_event_ctl)
157 _IOWR('W', 0x44, struct switchtec_ioctl_pff_port)
159 _IOWR('W', 0x45, struct switchtec_ioctl_pff_port)
/openbmc/linux/drivers/scsi/
H A Dnsp32.h81 #define IRQ_CONTROL 0x00 /* BASE+00, W, W */
82 #define IRQ_STATUS 0x00 /* BASE+00, W, R */
94 # define IRQSTATUS_AUTOSCSI_IRQ BIT(11)
112 #define TRANSFER_CONTROL 0x02 /* BASE+02, W, W */
113 #define TRANSFER_STATUS 0x02 /* BASE+02, W, R */
124 # define BM_SINGLE_MODE BIT(11)
130 #define INDEX_REG 0x04 /* BASE+04, Byte(R/W), Word(R) */
132 #define TIMER_SET 0x06 /* BASE+06, W, R/W */
136 #define DATA_REG_LOW 0x08 /* BASE+08, LowW, R/W */
137 #define DATA_REG_HI 0x0a /* BASE+0a, Hi-W, R/W */
[all …]
/openbmc/linux/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf.h23 #define PDAUDIOCF_REG_TCR 0x06 /* test control register W/O */
24 #define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */
26 #define PDAUDIOCF_REG_IER 0x0c /* interrupt enable, R/W */
27 #define PDAUDIOCF_REG_AK_IFR 0x0e /* AK interface register, R/W */
44 #define PDAUDIOCF_DATAFMT1 (1<<11) /* 10 = 20-bit, 11 = 24-bit, all right justified */
54 #define PDAUDIOCF_IRQLVLEN1 (1<<1) /* 10 = 1/4th of buffer, 11 = 1/2th of buffer */
58 #define PDAUDIOCF_BLUEDUTY1 (1<<9) /* 02 = 25%, 11 = 12% */
60 #define PDAUDIOCF_REDDUTY1 (1<<11) /* 02 = 25%, 11 = 12% */

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