Searched +full:0 +full:xfffffe50 (Results 1 – 9 of 9) sorted by relevance
31 enum: [0, 1]57 const: 065 reg = <0xfffffe50 0x4>;
18 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */30 #define ATMEL_ID_USART0 12 /* USART 0 */36 #define ATMEL_ID_TWI0 18 /* Two-Wire Interface 0 */39 #define ATMEL_ID_MCI0 21 /* High Speed Multimedia Card Interface 0 */42 #define ATMEL_ID_SPI0 24 /* Serial Peripheral Interface 0 */56 #define ATMEL_ID_SSC0 38 /* Synchronous Serial Controller 0 */70 #define ARCH_ID_SAMA5D3 0x8a5c07c071 #define ARCH_EXID_SAMA5D31 0x0044430072 #define ARCH_EXID_SAMA5D33 0x0041430073 #define ARCH_EXID_SAMA5D34 0x00414301[all …]
42 #size-cells = <0>;44 cpu@0 {47 reg = <0>;53 reg = <0x20000000 0x10000000>;59 #clock-cells = <0>;60 clock-frequency = <0>;65 #clock-cells = <0>;66 clock-frequency = <0>;72 reg = <0x00300000 0x8000>;75 ranges = <0 0x00300000 0x8000>;[all …]
44 #size-cells = <0>;46 cpu@0 {49 reg = <0>;55 reg = <0x20000000 0x10000000>;61 #clock-cells = <0>;62 clock-frequency = <0>;67 #clock-cells = <0>;68 clock-frequency = <0>;73 #clock-cells = <0>;80 reg = <0x00300000 0x8000>;[all …]
46 #size-cells = <0>;47 cpu@0 {50 reg = <0x0>;56 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;61 reg = <0x20000000 0x8000000>;67 #clock-cells = <0>;68 clock-frequency = <0>;73 #clock-cells = <0>;74 clock-frequency = <0>;79 #clock-cells = <0>;[all …]
37 #size-cells = <0>;39 cpu@0 {42 reg = <0>;48 reg = <0x20000000 0x10000000>;54 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x00300000 0x100000>;68 ranges = <0 0x00300000 0x100000>;79 #size-cells = <0>;81 reg = <0x00500000 0x100000[all …]
48 reg = <0x20000000 0x10000000>;54 #clock-cells = <0>;55 clock-frequency = <0>;60 #clock-cells = <0>;61 clock-frequency = <0>;67 reg = <0x00300000 0x8000>;88 reg = <0xfffff000 0x200>;94 reg = <0xffffe800 0x200>;101 reg = <0xfffffc00 0x200>;105 #size-cells = <0>;[all …]
51 reg = <0x20000000 0x10000000>;57 #clock-cells = <0>;58 clock-frequency = <0>;63 #clock-cells = <0>;64 clock-frequency = <0>;69 #clock-cells = <0>;76 reg = <0x00300000 0x8000>;97 reg = <0xfffff000 0x200>;103 reg = <0xffffe800 0x200>;110 reg = <0xfffffc00 0x200>;[all …]
45 #size-cells = <0>;46 cpu@0 {49 reg = <0x0>;55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;59 reg = <0x20000000 0x8000000>;65 #clock-cells = <0>;66 clock-frequency = <0>;71 #clock-cells = <0>;72 clock-frequency = <0>;77 #clock-cells = <0>;[all …]