Searched +full:0 +full:xff450000 (Results 1 – 4 of 4) sorted by relevance
31 #define DSI_PHY_RSTZ 0xa032 #define PHY_DISFORCEPLL 034 #define PHY_DISABLECLK 036 #define PHY_RSTZ 038 #define PHY_SHUTDOWNZ 039 #define PHY_UNSHUTDOWNZ BIT(0)41 #define DSI_PHY_IF_CFG 0xa442 #define N_LANES(n) ((((n) - 1) & 0x3) << 0)43 #define PHY_STOP_WAIT_TIME(cycle) (((cycle) & 0xff) << 8)45 #define DSI_PHY_STATUS 0xb0[all …]
39 #size-cells = <0>;41 cpu0: cpu@0 {44 reg = <0x0 0x0>;57 reg = <0x0 0x1>;67 reg = <0x0 0x2>;77 reg = <0x0 0x3>;90 arm,psci-suspend-param = <0x0010000>;104 cpu0_opp_table: opp-table-0 {144 #clock-cells = <0>;162 #clock-cells = <0>;[all …]
36 #size-cells = <0>;38 cpu0: cpu@0 {41 reg = <0x0 0x0>;54 reg = <0x0 0x1>;67 reg = <0x0 0x2>;80 reg = <0x0 0x3>;96 arm,psci-suspend-param = <0x0010000>;110 cpu0_opp_table: opp-table-0 {208 #clock-cells = <0>;215 reg = <0x0 0xff000000 0x0 0x1000>;[all …]
40 #size-cells = <0>;42 cpu0: cpu@0 {45 reg = <0x0 0x0>;57 reg = <0x0 0x1>;69 reg = <0x0 0x2>;81 reg = <0x0 0x3>;96 arm,psci-suspend-param = <0x0010000>;105 arm,psci-suspend-param = <0x1010000>;113 cpu0_opp_table: opp-table-0 {164 #clock-cells = <0>;[all …]