Searched +full:0 +full:xfd400000 (Results 1 – 8 of 8) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | xlnx,zynqmp-psgtr.yaml | 24 minimum: 0 34 minimum: 0 38 minimum: 0 50 Clock for each PS_MGTREFCLK[0-3] reference clock input. Unconnected 57 pattern: "^ref[0-3]$" 97 reg = <0xfd400000 0x40000>, 98 <0xfd3d0000 0x1000>; 100 clocks = <&refclks 3>, <&refclks 2>, <&refclks 0>;
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/openbmc/linux/arch/arm64/boot/dts/lg/ |
H A D | lg1312.dtsi | 20 #size-cells = <0>; 22 cpu0: cpu@0 { 25 reg = <0x0 0x0>; 31 reg = <0x0 0x1>; 38 reg = <0x0 0x2>; 45 reg = <0x0 0x3>; 59 cpu_suspend = <0x84000001>; 60 cpu_off = <0x84000002>; 61 cpu_on = <0x84000003>; 68 reg = <0x0 0xc0001000 0x1000>, [all …]
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H A D | lg1313.dtsi | 20 #size-cells = <0>; 22 cpu0: cpu@0 { 25 reg = <0x0 0x0>; 31 reg = <0x0 0x1>; 38 reg = <0x0 0x2>; 45 reg = <0x0 0x3>; 59 cpu_suspend = <0x84000001>; 60 cpu_off = <0x84000002>; 61 cpu_on = <0x84000003>; 68 reg = <0x0 0xc0001000 0x1000>, [all …]
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/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/ |
H A D | gaudi2_special_blocks.h | 16 { GAUDI2_BLOCK_TYPE_TPC, 0xfc008000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \ 17 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00a000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \ 18 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00b000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \ 19 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00c000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \ 20 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc080000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \ 21 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc081000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \ 22 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc083000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \ 23 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc084000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \ 24 { GAUDI2_BLOCK_TYPE_MME, 0xfc0c8000, 4, 0, 0, 0x200000, 0x0, 0x0 }, \ 25 { GAUDI2_BLOCK_TYPE_MME, 0xfc0c9000, 4, 0, 0, 0x200000, 0x0, 0x0 }, \ [all …]
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/openbmc/qemu/hw/arm/ |
H A D | xlnx-zynqmp.c | 39 #define GEM_REVISION 0x40070106 41 #define GIC_BASE_ADDR 0xf9000000 42 #define GIC_DIST_ADDR 0xf9010000 43 #define GIC_CPU_ADDR 0xf9020000 44 #define GIC_VIFACE_ADDR 0xf9040000 45 #define GIC_VCPU_ADDR 0xf9060000 48 #define SATA_ADDR 0xFD0C0000 51 #define QSPI_ADDR 0xff0f0000 52 #define LQSPI_ADDR 0xc0000000 54 #define QSPI_DMA_ADDR 0xff0f0800 [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | zynqmp.dtsi | 22 #size-cells = <0>; 24 cpu0: cpu@0 { 29 reg = <0x0>; 37 reg = <0x1>; 46 reg = <0x2>; 55 reg = <0x3>; 63 CPU_SLEEP_0: cpu-sleep-0 { 65 arm,psci-suspend-param = <0x40000000>; 108 interrupts = <0 143 4>, 109 <0 144 4>, [all …]
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/openbmc/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp.dtsi | 29 #size-cells = <0>; 31 cpu0: cpu@0 { 36 reg = <0x0>; 45 reg = <0x1>; 55 reg = <0x2>; 65 reg = <0x3>; 80 CPU_SLEEP_0: cpu-sleep-0 { 82 arm,psci-suspend-param = <0x40000000>; 123 reg = <0x0 0x3ed00000 0x0 0x40000>; 128 reg = <0x0 0x3ef00000 0x0 0x40000>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk356x.dtsi | 50 #size-cells = <0>; 52 cpu0: cpu@0 { 55 reg = <0x0 0x0>; 56 clocks = <&scmi_clk 0>; 65 reg = <0x0 0x100>; 74 reg = <0x0 0x200>; 83 reg = <0x0 0x300>; 90 cpu0_opp_table: opp-table-0 { 140 arm,smc-id = <0x82000010>; 143 #size-cells = <0>; [all …]
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