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/openbmc/openbmc/meta-quanta/meta-olympus-nuvoton/recipes-phosphor/console/obmc-console/
H A D80-olympus-nuvoton-sol.rules1 SUBSYSTEM=="tty", ATTRS{iomem_base}=="0xF0003000", ENV{SYSTEMD_WANTS}="obmc-console@ttyS2" SYMLINK+…
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dezchip_enet.txt12 reg = <0xf0003000 0x44>;
/openbmc/linux/arch/arc/boot/dts/
H A Dnsimosci.dts18 /* bootargs = "console=tty0 consoleblank=0"; */
20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
36 #clock-cells = <0>;
49 reg = <0xf0000000 0x2000>;
59 #clock-cells = <0>;
66 reg = <0xf9000000 0x400>;
73 reg = <0xf9000400 0x14>;
80 reg = <0xf0003000 0x44>;
H A Dnsimosci_hs.dts18 /* bootargs = "console=tty0 consoleblank=0"; */
20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
36 #clock-cells = <0>;
49 reg = <0xf0000000 0x2000>;
59 #clock-cells = <0>;
66 reg = <0xf9000000 0x400>;
73 reg = <0xf9000400 0x14>;
80 reg = <0xf0003000 0x44>;
H A Dnsimosci_hs_idu.dts18 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
34 #clock-cells = <0>;
54 reg = <0xf0000000 0x2000>;
56 interrupts = <0>;
65 #clock-cells = <0>;
72 reg = <0xf9000000 0x400>;
79 reg = <0xf9000400 0x14>;
87 reg = <0xf0003000 0x44>;
/openbmc/linux/arch/arc/plat-axs10x/
H A Daxs10x.c16 #define AXS_MB_CGU 0xE0010000
17 #define AXS_MB_CREG 0xE0011000
19 #define CREG_MB_IRQ_MUX (AXS_MB_CREG + 0x214)
20 #define CREG_MB_SW_RESET (AXS_MB_CREG + 0x220)
21 #define CREG_MB_VER (AXS_MB_CREG + 0x230)
22 #define CREG_MB_CONFIG (AXS_MB_CREG + 0x234)
24 #define AXC001_CREG 0xF0001000
25 #define AXC001_GPIO_INTC 0xF0003000
61 #define GPIO_INTEN (AXC001_GPIO_INTC + 0x30) in axs10x_enable_gpio_intc_wire()
62 #define GPIO_INTMASK (AXC001_GPIO_INTC + 0x34) in axs10x_enable_gpio_intc_wire()
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/openbmc/qemu/hw/arm/
H A Dnpcm7xx.c36 #define NPCM7XX_MMIO_BA (0x80000000)
37 #define NPCM7XX_MMIO_SZ (0x7ffd0000)
40 #define NPCM7XX_OTP1_BA (0xf0189000)
41 #define NPCM7XX_OTP2_BA (0xf018a000)
44 #define NPCM7XX_L2C_BA (0xf03fc000)
45 #define NPCM7XX_CPUP_BA (0xf03fe000)
46 #define NPCM7XX_GCR_BA (0xf0800000)
47 #define NPCM7XX_CLK_BA (0xf0801000)
48 #define NPCM7XX_MC_BA (0xf0824000)
49 #define NPCM7XX_RNG_BA (0xf000b000)
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/openbmc/linux/arch/powerpc/kernel/
H A Dprom_init.c57 #define DEVTREE_CHUNK_SIZE 0x100000
63 * entry with size 0, so it can be changed without breaking binary
90 #define OF_WORKAROUNDS 0
102 #define prom_debug(x...) do { } while (0)
189 #define PLATFORM_PSERIES 0x0100
190 #define PLATFORM_PSERIES_LPAR 0x0101
191 #define PLATFORM_LPAR 0x0001
192 #define PLATFORM_POWERMAC 0x0400
193 #define PLATFORM_GENERIC 0x0500
217 * will return 0, some will return either. To simplify, here are
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