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/openbmc/linux/drivers/clk/hisilicon/
H A Dclk-hi3519.c35 { HI3519_FIXED_24M, "24m", NULL, 0, 24000000, },
36 { HI3519_FIXED_50M, "50m", NULL, 0, 50000000, },
37 { HI3519_FIXED_75M, "75m", NULL, 0, 75000000, },
38 { HI3519_FIXED_125M, "125m", NULL, 0, 125000000, },
39 { HI3519_FIXED_150M, "150m", NULL, 0, 150000000, },
40 { HI3519_FIXED_200M, "200m", NULL, 0, 200000000, },
41 { HI3519_FIXED_250M, "250m", NULL, 0, 250000000, },
42 { HI3519_FIXED_300M, "300m", NULL, 0, 300000000, },
43 { HI3519_FIXED_400M, "400m", NULL, 0, 400000000, },
48 static u32 fmc_mux_table[] = {0, 1, 2, 3, 4, 5, 6, 7};
[all …]
H A Dcrg-hi3516cv300.c40 { HI3516CV300_FIXED_3M, "3m", NULL, 0, 3000000, },
41 { HI3516CV300_FIXED_6M, "6m", NULL, 0, 6000000, },
42 { HI3516CV300_FIXED_24M, "24m", NULL, 0, 24000000, },
43 { HI3516CV300_FIXED_49P5, "49.5m", NULL, 0, 49500000, },
44 { HI3516CV300_FIXED_50M, "50m", NULL, 0, 50000000, },
45 { HI3516CV300_FIXED_83P3M, "83.3m", NULL, 0, 83300000, },
46 { HI3516CV300_FIXED_99M, "99m", NULL, 0, 99000000, },
47 { HI3516CV300_FIXED_100M, "100m", NULL, 0, 100000000, },
48 { HI3516CV300_FIXED_148P5M, "148.5m", NULL, 0, 148500000, },
49 { HI3516CV300_FIXED_198M, "198m", NULL, 0, 198000000, },
[all …]
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7986-eth.c18 .set_ofs = 0xe4,
19 .clr_ofs = 0xe4,
20 .sta_ofs = 0xe4,
34 .set_ofs = 0xe4,
35 .clr_ofs = 0xe4,
36 .sta_ofs = 0xe4,
50 .set_ofs = 0x30,
51 .clr_ofs = 0x30,
52 .sta_ofs = 0x30,
H A Dclk-mt7981-eth.c20 .set_ofs = 0xE4,
21 .clr_ofs = 0xE4,
22 .sta_ofs = 0xE4,
42 .set_ofs = 0xE4,
43 .clr_ofs = 0xE4,
44 .sta_ofs = 0xE4,
64 .set_ofs = 0x30,
65 .clr_ofs = 0x30,
66 .sta_ofs = 0x30,
H A Dclk-mt7622-eth.c21 .set_ofs = 0x30,
22 .clr_ofs = 0x30,
23 .sta_ofs = 0x30,
35 .set_ofs = 0xE4,
36 .clr_ofs = 0xE4,
37 .sta_ofs = 0xE4,
54 static u16 rst_ofs[] = { 0x34, };
H A Dclk-mt7629-eth.c21 .set_ofs = 0x30,
22 .clr_ofs = 0x30,
23 .sta_ofs = 0x30,
35 .set_ofs = 0xE4,
36 .clr_ofs = 0xE4,
37 .sta_ofs = 0xE4,
65 static u16 rst_ofs[] = { 0x34, };
/openbmc/linux/crypto/
H A Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
222 "\x63\x1c\xcd\x7b\xe1\x7e\xe4\xde\xc9\xa8\x89\xa1\x74\xcb\x3c\x63"
223 "\x7d\x24\xec\x83\xc3\x15\xe4\x7f\x73\x05\x34\xd1\xec\x22\xbb\x8a"
252 "\xAF\x94\x28\xC2\xB7\xB8\x88\x3F\xE4\x46\x3A\x4B\xC8\x5B\x1C\xB3"
267 "\x54\x49\x4C\xA6\x3E\xBA\x03\x37\xE4\xE2\x40\x23\xFC\xD6\x9A\x5A"
274 "\xF9\x80\x3F\x8F\x6F\x8A\xE3\x42\xE9\x31\xFD\x8A\xE4\x7A\x22\x0D"
304 "\x41\xE4\x25\x99\xAC\xFC\xD2\x0F\x02\xD3\xD1\x54\x06\x1A\x51\x77"
307 "\x8C\x33\xE4\x36\xB8\x43\xEB\x19\x2A\x81\x8D\xDE\x81\x0A\x99\x48"
324 "\xEF\x7F\x60\xE4\xE6\x05\x82\x89\x5D\xDF\xC6\xD2\x6C\x07\x91\x33"
[all …]
H A Ddh.c27 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx()
50 return (p_len < 2048) ? -EINVAL : 0; in dh_check_params_length()
52 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length()
68 return 0; in dh_set_params()
80 if (crypto_dh_decode_key(buf, len, &params) < 0) in dh_set_secret()
83 if (dh_set_params(ctx, &params) < 0) in dh_set_secret()
90 return 0; in dh_set_secret()
120 if (mpi_cmp_ui(y, 1) < 1 || mpi_cmp(y, ctx->p) >= 0) in dh_is_pubkey_valid()
132 val = mpi_alloc(0); in dh_is_pubkey_valid()
159 if (ret != 0) in dh_is_pubkey_valid()
[all …]
/openbmc/linux/drivers/char/
H A Dtoshiba.c11 * 0xfc02: Scott Eisert <scott.e@sky-eye.com>
12 * 0xfc04: Steve VanDevender <stevev@efn.org>
13 * 0xfc08: Garth Berry <garth@itsbruce.net>
14 * 0xfc0a: Egbert Eich <eich@xfree86.org>
15 * 0xfc10: Andrew Lofthouse <Andrew.Lofthouse@robins.af.mil>
16 * 0xfc11: Spencer Olson <solson@novell.com>
17 * 0xfc13: Claudius Frankewitz <kryp@gmx.de>
18 * 0xfc15: Tom May <tom@you-bastards.com>
19 * 0xfc17: Dave Konrad <konrad@xenia.it>
20 * 0xfc1a: George Betzos <betzos@engr.colostate.edu>
[all …]
/openbmc/linux/drivers/media/dvb-frontends/
H A Ds5h1432.c40 } while (0)
48 struct i2c_msg msg = {.addr = addr, .flags = 0, .buf = buf, .len = 2 }; in s5h1432_writereg()
53 printk(KERN_ERR "%s: writereg error 0x%02x 0x%02x 0x%04x, ret == %i)\n", in s5h1432_writereg()
56 return (ret != 1) ? -1 : 0; in s5h1432_writereg()
63 u8 b1[] = { 0 }; in s5h1432_readreg()
66 {.addr = addr, .flags = 0, .buf = b0, .len = 1}, in s5h1432_readreg()
75 return b1[0]; in s5h1432_readreg()
80 return 0; in s5h1432_sleep()
88 u8 reg = 0; in s5h1432_set_channel_bandwidth()
90 /* Register [0x2E] bit 3:2 : 8MHz = 0; 7MHz = 1; 6MHz = 2 */ in s5h1432_set_channel_bandwidth()
[all …]
/openbmc/linux/fs/nls/
H A Dnls_euc-jp.c17 #define IS_SJIS_LOW_BYTE(l) ((0x40 <= (l)) && ((l) <= 0xFC) && ((l) != 0x7F))
19 #define IS_SJIS_JISX0208(h, l) ((((0x81 <= (h)) && ((h) <= 0x9F)) \
20 || ((0xE0 <= (h)) && ((h) <= 0xEA))) \
22 #define IS_SJIS_JISX0201KANA(c) ((0xA1 <= (c)) && ((c) <= 0xDF))
23 #define IS_SJIS_UDC_LOW(h, l) (((0xF0 <= (h)) && ((h) <= 0xF4)) \
25 #define IS_SJIS_UDC_HI(h, l) (((0xF5 <= (h)) && ((h) <= 0xF9)) \
27 #define IS_SJIS_IBM(h, l) (((0xFA <= (h)) && ((h) <= 0xFC)) \
29 #define IS_SJIS_NECIBM(h, l) (((0xED <= (h)) && ((h) <= 0xEE)) \
32 if ((sjis_lo) >= 0x9F) { \
37 (euc_lo) = (sjis_lo) + ((sjis_lo) >= 0x7F ? 0x60 : 0x61); \
[all …]
H A Dnls_cp932.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x3000,0x3001,0x3002,0xFF0C,0xFF0E,0x30FB,0xFF1A,0xFF1B,/* 0x40-0x47 */
26 0xFF1F,0xFF01,0x309B,0x309C,0x00B4,0xFF40,0x00A8,0xFF3E,/* 0x48-0x4F */
[all …]
/openbmc/linux/drivers/target/
H A Dtarget_core_xcopy.c41 * @return: 1 on match, 0 on no-match
51 return 0; in target_xcopy_locate_se_dev_e4_iter()
54 memset(&tmp_dev_wwn[0], 0, XCOPY_NAA_IEEE_REGEX_LEN); in target_xcopy_locate_se_dev_e4_iter()
55 spc_gen_naa_6h_vendor_specific(se_dev, &tmp_dev_wwn[0]); in target_xcopy_locate_se_dev_e4_iter()
57 rc = memcmp(&tmp_dev_wwn[0], dev_wwn, XCOPY_NAA_IEEE_REGEX_LEN); in target_xcopy_locate_se_dev_e4_iter()
58 if (rc != 0) { in target_xcopy_locate_se_dev_e4_iter()
61 return 0; in target_xcopy_locate_se_dev_e4_iter()
63 pr_debug("XCOPY 0xe4: located se_dev: %p\n", se_dev); in target_xcopy_locate_se_dev_e4_iter()
82 pr_debug("XCOPY 0xe4: searching for: %*ph\n", in target_xcopy_locate_se_dev_e4()
109 return 0; in target_xcopy_locate_se_dev_e4()
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-m53menlo.dts15 pinctrl-0 = <&pinctrl_power_button>;
27 pinctrl-0 = <&pinctrl_power_out>;
35 pinctrl-0 = <&pinctrl_led>;
61 #size-cells = <0>;
63 port@0 {
64 reg = <0>;
83 pinctrl-0 = <&pinctrl_display_gpio>;
85 enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
96 pinctrl-0 = <&pinctrl_beeper>;
105 gpio = <&gpio1 2 0>;
[all …]
/openbmc/u-boot/drivers/net/phy/
H A Dmscc.c18 #define PHY_ID_VSC8530 0x00070560
19 #define PHY_ID_VSC8531 0x00070570
20 #define PHY_ID_VSC8540 0x00070760
21 #define PHY_ID_VSC8541 0x00070770
22 #define PHY_ID_VSC8574 0x000704a0
23 #define PHY_ID_VSC8584 0x000707c0
27 #define MSCC_PHY_PAGE_STD 0x0000 /* Standard registers */
28 #define MSCC_PHY_PAGE_EXT1 0x0001 /* Extended registers - page 1 */
29 #define MSCC_PHY_PAGE_EXT2 0x0002 /* Extended registers - page 2 */
30 #define MSCC_PHY_PAGE_EXT3 0x0003 /* Extended registers - page 3 */
[all …]
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_4_0_sdm845.h12 .max_mixer_blendstages = 0xb,
26 .base = 0x0, .len = 0x45c,
29 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
30 [DPU_CLK_CTRL_VIG1] = { .reg_off = 0x2b4, .bit_off = 0 },
31 [DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
32 [DPU_CLK_CTRL_VIG3] = { .reg_off = 0x2c4, .bit_off = 0 },
33 [DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
34 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
35 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
36 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
[all …]
/openbmc/linux/drivers/gpu/drm/panel/
H A Dpanel-magnachip-d53e6ea8966.c74 #define MCS_ELVSS_ON 0xb1
75 #define MCS_TEMP_SWIRE 0xb2
76 #define MCS_PASSWORD_0 0xf0
77 #define MCS_PASSWORD_1 0xf1
78 #define MCS_ANALOG_PWR_CTL_0 0xf4
79 #define MCS_ANALOG_PWR_CTL_1 0xf5
80 #define MCS_GTCON_SET 0xf7
81 #define MCS_GATELESS_SIGNAL_SET 0xf8
82 #define MCS_SET_GAMMA 0xf9
91 {0x01, 0x79, 0x78, 0x8d, 0xd9, 0xdf, 0xd5, 0xcb, 0xcf, 0xc5,
[all …]
/openbmc/qemu/tests/bench/
H A Dtest_akcipher_keys.c.inc12 0x30, 0x82, 0x02, 0x5c, 0x02, 0x01, 0x00, 0x02,
13 0x81, 0x81, 0x00, 0xe6, 0x4d, 0x76, 0x4f, 0xb2,
14 0x97, 0x09, 0xad, 0x9d, 0x17, 0x33, 0xf2, 0x30,
15 0x42, 0x83, 0xa9, 0xcb, 0x49, 0xa4, 0x2e, 0x59,
16 0x5e, 0x75, 0x51, 0xd1, 0xac, 0xc8, 0x86, 0x3e,
17 0xdb, 0x72, 0x2e, 0xb2, 0xf7, 0xc3, 0x5b, 0xc7,
18 0xea, 0xed, 0x30, 0xd1, 0xf7, 0x37, 0xee, 0x9d,
19 0x36, 0x59, 0x6f, 0xf8, 0xce, 0xc0, 0x5c, 0x82,
20 0x80, 0x37, 0x83, 0xd7, 0x45, 0x6a, 0xe9, 0xea,
21 0xc5, 0x3a, 0x59, 0x6b, 0x34, 0x31, 0x44, 0x00,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dbrcm,misc.yaml49 reg = <0xff802600 0xe4>;
53 ranges = <0x0 0x0 0xe4>;
57 reg = <0x44 0x4>;
/openbmc/linux/drivers/platform/x86/
H A Dmsi-ec.c50 .address = 0xef,
51 .offset_start = 0x8a,
52 .offset_end = 0x80,
53 .range_min = 0x8a,
54 .range_max = 0xe4,
57 .address = 0x2e,
58 .block_address = 0x2f,
62 .address = 0xbf,
66 .address = 0x98,
70 .address = 0xf2,
[all …]
/openbmc/qemu/tests/migration/aarch64/
H A Da-b-kernel.h7 0x00, 0x10, 0x38, 0xd5, 0x00, 0xf8, 0x7f, 0x92, 0x00, 0x10, 0x18, 0xd5,
8 0xdf, 0x3f, 0x03, 0xd5, 0x00, 0x02, 0xa8, 0xd2, 0x01, 0xc8, 0xa8, 0xd2,
9 0x23, 0x08, 0x80, 0x52, 0x02, 0x20, 0xa1, 0xd2, 0x43, 0x00, 0x00, 0x39,
10 0x03, 0x00, 0x80, 0x52, 0xe4, 0x03, 0x00, 0xaa, 0x83, 0x00, 0x00, 0x39,
11 0x84, 0x04, 0x40, 0x91, 0x9f, 0x00, 0x01, 0xeb, 0xad, 0xff, 0xff, 0x54,
12 0x05, 0x00, 0x80, 0x52, 0xe4, 0x03, 0x00, 0xaa, 0x83, 0x00, 0x40, 0x39,
13 0x63, 0x04, 0x00, 0x11, 0x83, 0x00, 0x00, 0x39, 0x24, 0x7e, 0x0b, 0xd5,
14 0x84, 0x04, 0x40, 0x91, 0x9f, 0x00, 0x01, 0xeb, 0x4b, 0xff, 0xff, 0x54,
15 0xa5, 0x04, 0x00, 0x11, 0xa5, 0x10, 0x00, 0x12, 0xbf, 0x00, 0x00, 0x71,
16 0xa1, 0xfe, 0xff, 0x54, 0x43, 0x08, 0x80, 0x52, 0x43, 0x00, 0x00, 0x39,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/reset/
H A Dkeystone-reset.txt32 in format: <0>, <2>; It can be in random order and
33 begins from 0 to 3, as keystone can contain up to 4 SoC
42 reg = <0x02310000 0x200>;
47 reg = <0x02620000 0x1000>;
52 ti,syscon-pll = <&pllctrl 0xe4>;
53 ti,syscon-dev = <&devctrl 0x328>;
54 ti,wdt-list = <0>;
63 ti,syscon-pll = <&pllctrl 0xe4>;
64 ti,syscon-dev = <&devctrl 0x328>;
65 ti,wdt-list = <0>, <2>;
/openbmc/u-boot/lib/tizen/
H A Dtizen_logo_16bpp_gzip.h12 0x1f,0x8b,0x08,0x08,0xd9,0x76,0x29,0x53,0x00,0x03,0x74,0x69,0x7a,0x65,0x6e,0x5f,
13 0x6c,0x6f,0x67,0x6f,0x2e,0x62,0x6d,0x70,0x00,0xed,0x9d,0x6f,0x6c,0x1b,0x67,0x7e,
14 0xe7,0xa9,0x4d,0x80,0x65,0xbb,0x2e,0x56,0xb1,0xd8,0x25,0xcf,0x0a,0x70,0x52,0xa4,
15 0x2d,0xc2,0x5a,0x39,0x58,0x35,0xf7,0x42,0x35,0x7a,0x63,0xd5,0x6a,0x1b,0x9d,0x5c,
16 0xd4,0x0a,0x85,0xca,0xde,0x35,0x70,0x1b,0xc7,0x29,0xbc,0xaa,0xbb,0x50,0x14,0x0a,
17 0xd6,0x79,0xdf,0x9c,0x2b,0x07,0x88,0xa1,0xb8,0x88,0x4a,0x11,0x2b,0x83,0x7a,0x71,
18 0xc9,0xd2,0x6e,0x1d,0x4c,0x76,0xa1,0x60,0x28,0x44,0xc5,0xe8,0x8d,0x6b,0xba,0xbd,
19 0x14,0xca,0x56,0xba,0x0e,0x51,0x05,0x70,0x0b,0x24,0xa8,0x83,0x7a,0xef,0x5c,0x54,
20 0x77,0x61,0x6a,0xbf,0xb9,0x79,0xe6,0x99,0xe7,0x79,0x7e,0xf3,0x87,0x9c,0x67,0x86,
21 0xc3,0x7f,0xca,0xf3,0x7d,0x30,0x1a,0x92,0xe2,0x9f,0x21,0x39,0x1f,0x7e,0x7f,0xcf,
[all …]
/openbmc/linux/drivers/ufs/host/
H A Dufs-hisi.h14 #define PSW_POWER_CTRL (0x04)
15 #define PHY_ISO_EN (0x08)
16 #define HC_LP_CTRL (0x0C)
17 #define PHY_CLK_CTRL (0x10)
18 #define PSW_CLK_CTRL (0x14)
19 #define CLOCK_GATE_BYPASS (0x18)
20 #define RESET_CTRL_EN (0x1C)
21 #define UFS_SYSCTRL (0x5C)
22 #define UFS_DEVICE_RESET_CTRL (0x60)
25 #define BIT_UFS_PSW_MTCMOS_EN (1 << 0)
[all …]
/openbmc/linux/drivers/net/wireless/intersil/p54/
H A Dp54spi_eeprom.h19 0x47, 0x4d, 0x55, 0xaa, /* magic */
20 0x00, 0x00, /* pad */
21 0x00, 0x00, /* eeprom_pda_data_wrap length */
22 0x00, 0x00, 0x00, 0x00, /* arm opcode */
25 0x04, 0x00, 0x01, 0x01, /* PDR_MAC_ADDRESS */
26 0x00, 0x02, 0xee, 0xc0, 0xff, 0xee,
29 0x06, 0x00, 0x01, 0x10, /* PDR_INTERFACE_LIST */
30 0x00, 0x00, /* role */
31 0x0f, 0x00, /* if_id */
32 0x85, 0x00, /* variant = Longbow RF, 2GHz */
[all …]

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