Home
last modified time | relevance | path

Searched +full:0 +full:xd4015000 (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-armada100/
H A Darmada100.h15 #define APBC_APBCLK (1<<0) /* APB Bus Clock Enable */
19 #define APBC_FNCLKSEL(x) (((x) & 0xf) << 4)
22 #define FE_CLK_RST 0x1
23 #define FE_CLK_ENA 0x8
26 #define SSP2_APBCLK 0x01
27 #define SSP2_FNCLK 0x02
30 #define USB_SPH_AXICLK_EN 0x10
31 #define USB_SPH_AXI_RST 0x02
38 #define ARMD1_DRAM_BASE 0xB0000000
39 #define ARMD1_FEC_BASE 0xC0800000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmarvell,mmp2-clock.yaml62 reg = <0xd4050000 0x1000>,
63 <0xd4282800 0x400>,
64 <0xd4015000 0x1000>;
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dpxa910.dtsi30 marvell,tauros2-cache-features = <0x3>;
37 reg = <0xd4200000 0x00200000>;
44 reg = <0xd4282000 0x1000>;
54 reg = <0xd4000000 0x00200000>;
59 reg = <0xd4014000 0x100>;
65 reg = <0xd4016000 0x100>;
72 reg = <0xd4017000 0x1000>;
82 reg = <0xd4018000 0x1000>;
92 reg = <0xd4036000 0x1000>;
104 reg = <0xd4019000 0x1000>;
[all …]
H A Dpxa168.dtsi32 reg = <0xd4200000 0x00200000>;
39 reg = <0xd4282000 0x1000>;
49 reg = <0xd4000000 0x00200000>;
54 reg = <0xd4014000 0x100>;
62 reg = <0xd4017000 0x1000>;
72 reg = <0xd4018000 0x1000>;
82 reg = <0xd4026000 0x1000>;
94 reg = <0xd4019000 0x1000>;
106 reg = <0xd4019000 0x4>;
110 reg = <0xd4019004 0x4>;
[all …]
H A Dmmp2.dtsi33 marvell,tauros2-cache-features = <0x3>;
40 reg = <0xd4200000 0x00200000>;
45 reg = <0xd420d000 0x4000>;
58 reg = <0xd4282000 0x1000>;
67 reg = <0x150 0x4>, <0x168 0x4>;
77 reg = <0x154 0x4>, <0x16c 0x4>;
88 reg = <0x180 0x4>, <0x17c 0x4>;
98 reg = <0x158 0x4>, <0x170 0x4>;
108 reg = <0x15c 0x4>, <0x174 0x4>;
118 reg = <0x160 0x4>, <0x178 0x4>;
[all …]
H A Dmmp3.dtsi16 #size-cells = <0>;
19 cpu@0 {
23 reg = <0>;
45 reg = <0xd4200000 0x00200000>;
52 reg = <0xd4282000 0x1000>,
53 <0xd4284000 0x100>;
62 reg = <0x150 0x4>, <0x168 0x4>;
72 reg = <0x154 0x4>, <0x16c 0x4>;
82 reg = <0x1bc 0x4>, <0x1a4 0x4>;
92 reg = <0x1c0 0x4>, <0x1a8 0x4>;
[all …]