Searched +full:0 +full:xb000000 (Results 1 – 5 of 5) sorted by relevance
19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary21 containing the revised ICSSG v1.1 (eg: J721E, AM65x SR2.0) have an extra two46 - ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs79 pattern: "^rtu@[0-9a-f]+$"91 pattern: "^txpru@[0-9a-f]+"95 pattern: "^pru@[0-9a-f]+$"108 pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */112 ranges = <0x0 0x300000 0x80000>;114 pruss: pruss@0 {116 reg = <0x0 0x80000>;[all …]
11 #define FSL_XCVR_MODE_SPDIF 016 #define FSL_XCVR_REG_OFFSET 0x800 /* regs offset */17 #define FSL_XCVR_FIFO_SIZE 0x80 /* 128 */23 #define FSL_XCVR_RX_FIFO_ADDR 0x0C0024 #define FSL_XCVR_TX_FIFO_ADDR 0x0E0026 #define FSL_XCVR_VERSION 0x00 /* Version */27 #define FSL_XCVR_EXT_CTRL 0x10 /* Control */28 #define FSL_XCVR_EXT_STATUS 0x20 /* Status */29 #define FSL_XCVR_EXT_IER0 0x30 /* Interrupt en 0 */30 #define FSL_XCVR_EXT_IER1 0x40 /* Interrupt en 1 */[all …]
12 reg = <0x0 0x70000000 0x0 0x200000>;15 ranges = <0x0 0x0 0x70000000 0x200000>;17 atf-sram@0 {18 reg = <0x0 0x20000>;22 reg = <0xf0000 0x10000>;26 reg = <0x100000 0x100000>;37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */38 <0x00 0x01880000 0x00 0x90000>, /* GICR */39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */[all …]
15 #clock-cells = <0>;17 clock-frequency = <0>;21 #clock-cells = <0>;23 clock-frequency = <0>;30 reg = <0x0 0x70000000 0x0 0x800000>;33 ranges = <0x0 0x0 0x70000000 0x800000>;35 atf-sram@0 {36 reg = <0x0 0x20000>;42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */45 ranges = <0x0 0x0 0x00100000 0x1c000>;[all …]
27 #define mmMM_INDEX 0x028 #define mmMM_INDEX_HI 0x629 #define mmMM_DATA 0x130 #define mmBIF_MM_INDACCESS_CNTL 0x150031 #define mmBUS_CNTL 0x150832 #define mmCONFIG_CNTL 0x150933 #define mmCONFIG_MEMSIZE 0x150a34 #define mmCONFIG_F0_BASE 0x150b35 #define mmCONFIG_APER_SIZE 0x150c36 #define mmCONFIG_REG_APER_SIZE 0x150d[all …]